• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.8 no.4
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• pp.59-65
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• 2008

This paper proposed a H.264 deblocking filter for the portable low-power multimedia. In H.264 deblocking filter, total 8 input pixels in filtering operations needs own filtering operation process respectively, and each filtering process has common structures for each filtering operation. By sharing common filter coefficients and registers, we have designed and implemented an smaller gated module, and moreover filtering operations are skipped on some or whole pixels what if we use some specific condition to operate filtering modules that need lots of operations. In the core of filtering modules, we achieve 33.31% and 10.85% gate count reduction compared with those of filtering modules of the conventional deblocking filter papers. The proposed low-power deblocking filter is implemented by using samsung 0.35um standard cell library technology, the maximum operationh frequency is 108MHz, and the maximum throughput is 33.03 frames/s with CCIR601 image format.

• Journal of Broadcast Engineering
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• v.17 no.5
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• pp.742-755
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• 2012

In this paper, we propose a parallel deblocking algorithm to resolve workload imbalance when the deblocking filter of high efficiency video coding (HEVC) decoder is parallelized. In HEVC, the deblocking filter which is one of the in-loop filters conducts two-step filtering on vertical edges first and horizontal edges later. The deblocking filtering can be conducted with high-speed through data-level parallelism because there is no dependency between adjacent edges for deblocking filtering processes. However, workloads would be imbalanced among regions even though the same amount of data for each region is allocated, which causes performance loss of decoder parallelization. In this paper, we solve the problem for workload imbalance by predicting the complexity of deblocking filtering with coding unit (CU) depth information at a coding tree block (CTB) and by allocating the same amount of workload to each core. Experimental results show that the proposed method achieves average time saving (ATS) by 64.3%, compared to single core-based deblocking filtering and also achieves ATS by 6.7% on average and 13.5% on maximum, compared to the conventional uniform data-level parallelism.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.1 s.343
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• pp.79-84
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• 2006

This paper proposed a novel H.264 deblocking filter for low-power mobile multimedia SoCs. In H.264 deblocking filter, filtering can be skipped on some pixels when pixel value differences satisfy some specific conditions. Furthermore, whole filtering can be skipped when quantization parameter is less than 16. Based on these features, power consumption can be significantly reduced by shutting down deblocking filter partially or as a whole. The proposed deblocking filter can shut down partial or whole blocks with simple control circuits. Common hardware performs both horizontal filtering and vertical filtering. It was implemented in silicon chip using $0.35{\mu}m$ standard cell library technology. The gate count is about 20,000 gates. The maximum operation frequency is 108MHz. The maximum throughput is 30 frame/s with CCIR601 image format.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.4
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• pp.227-233
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• 2006

In order to reduce blocking artifacts and improve compression efficiency, H.264/AVC standard employs an adaptive in-loop deblocking filter. This paper proposes a new hardware architecture of the deblocking filter that employs a four-stage pipelined structure with an efficient data distribution. The proposed architecture allows a simultaneous supply of eight data samples to fully utilize the pipelined filter in both horizontal and vertical filterings. This paper also presents a new filtering order and data reuse scheme between consecutive macroblock filterings to reduce the communication for external memory access. The number of required cycles for filtering one macroblock (MB) is 357 cycles when the proposed filter uses dual port SRAMs. This execution speed is only 41.3% of that of the fastest previous work.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.2 s.302
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• pp.19-26
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• 2005

After various video coding standards such as H.263, MPEG-4, and H.264 have been introduced, there has bun strong need to support the multiple standards with limited resources efficiently. In terms of deblocking Inter which plays an important role in improving visual quality, K264 deblocking filter implementation has different aspects as compared with traditional $8\times8$ block-based post-filter implementation. Analyzing the differences, this paper proposes a H.264 deblocking filter implementation method that supports $8\times8$ block-based post-filtering for the traditional video coding systems. In the proposed implementation method the block boundaries to he filtered are adaptively chosen for $8\times8$ and $4\times4$ block boundary filtering. Since the filtered result is selectively used for motion compensation or not, both loop-filtering and post-filtering can be achieved. A quantization parameter conversion unit that converts H.263 quantization parameters to H.264 quantization parameters is utilized by examining the $8\times8$ block boundary errors based on human visual system. Since the original nature of the H.264 deblocking filter is well expanded to the $8\times8$ block-based post-filter with minor modifications, the proposed implementation method is suitable to implement the deblocking function of the multiple video standards such as H.263, MPEG-4, and K264, efficiently.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.46-49
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• 2000

An iterative deblocking algorithm for DCT-compressed images using two-dimensional FIR filters adapted for local directionality of each block, is proposed. First, we introduce a set of simple lowpass filters, which are adapted for edges of different angles. In conventional deblocking methods based on lowpass-filtering and convex projections, a single filter is applied to a whole image. In the proposed method, on the other hand, a suitable filter is chosen out of the directional filters designed previously in every subimage (typically $8{\times}8$ block). Experimental results indicate that adaptive filtering improves PSNR at each iteration.

• The Journal of Korean Association of Computer Education
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• v.13 no.4
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• pp.77-86
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• 2010

In this paper, we propose a real time post-processing visual enhancement technique to reduce the blocking artifacts in block based DCT decoded image for mobile devices that have allocation of the restricted resource. In order to reduce the blocking artifacts effectively even while preserving the image edge to the utmost, the proposed algorithm uses the deblocking filtering or the directional filtering according to the edge detection of the each pixel. After it is discriminated that the pixel to apply the deblocking filtering belongs again to the monotonous area, the weighted average filter with the adaptive mask is applied for the pixel to remove the blocking artifacts. On the other hand, a new directional filter is utilized to get rid of staircase noise and preserve the original edge component. Experimental results show that the proposed algorithm produces better results than those of the conventional algorithms in both subjective and objective qualities.

• Journal of Information Processing Systems
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• v.12 no.4
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• pp.631-643
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• 2016

Due to the block-based discrete cosine transform (BDCT), JPEG compressed images usually exhibit blocking artifacts. When the bit rates are very low, blocking artifacts will seriously affect the image's visual quality. A bilateral filter has the features for edge-preserving when it smooths images, so we propose an adaptive-weighted bilateral filter based on the features. In this paper, an image-deblocking scheme using this kind of adaptive-weighted bilateral filter is proposed to remove and reduce blocking artifacts. Two parameters of the proposed adaptive-weighted bilateral filter are adaptive-weighted so that it can avoid over-blurring unsmooth regions while eliminating blocking artifacts in smooth regions. This is achieved in two aspects: by using local entropy to control the level of filtering of each single pixel point within the image, and by using an improved blind image quality assessment (BIQA) to control the strength of filtering different images whose blocking artifacts are different. It is proved by our experimental results that our proposed image-deblocking scheme provides good performance on eliminating blocking artifacts and can avoid the over-blurring of unsmooth regions.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.7
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• pp.52-60
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• 2008

The deblocking filter in the H.264/AVC video coding standard helps to reduce the blocking artifacts produced in the decoding process. But it consumes one third of the computational complexity in H.624/AVC decoder, which advocates an efficient design of a hardware accelerator for filtering. This paper proposes an architecture of deblocking filter using two filters and some registers for data reuse. Our architecture improves the throughput and minimize the number of external memory access by increasing data reuse. After initialization, two filters are able to perform filtering operation simultaneously. It takes only 96 clocks to complete filtering for one macroblock. We design and synthesis our architecture using Dongbuanam $0.18{\mu}m$ standard cell library and the maximum clock frequency is 200MHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.4
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• pp.699-706
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• 2008

H.264/AVC is a new international standard for the compression of video images, in which a deblocking filter has been adopted to remoye blocking artifacts. This paper proposes an efficient architecture of deblocking filter in H.264/AVC. By making good use of data dependence between neighboring $4{\times}4$ blocks, the memory sire is reduced and the throughput of the deblocking filter processing is increased. The designed deblocking filter further enhances the parallelism by simultaneously executing horizontal and vertical filtering within a macroblock in pipeline method and adopting overlap between macroblocks. The implementation result shows that the proposed architecture enhances the performance of deblocking filter processing from 1.75 to 4.23 times than that of the conventional deblocking filter. Hence the Proposed architecture of deblocking filter is able to perform real-time deblocking in high-resolution($2048{\times}1024$) video applications.