• Title/Summary/Keyword: data scheduling

Search Result 1,040, Processing Time 0.023 seconds

Real-Time Scheduler with Extended Schedulability Testing for Mach Kernel Reconfiguration (Mach 커널의 재구성을 위한 확장된 스케줄 가능성 검사를 수행하는 실시간 스케줄러)

  • Ryu, Jin-Yeol;Kim, Kwang;Heu, Shin
    • The Transactions of the Korea Information Processing Society
    • /
    • v.7 no.2
    • /
    • pp.507-519
    • /
    • 2000
  • n this paper, we implement the real-time scheduler which performs extended schedulability testing, to reconfigure Mach kernel in which Real-Time scheduling is possible. for this purpose, first, we propose the configuration factors according to requirements of Real-Time operation systems and we analyze a Real-time scheduling algorithm. Second, for the reconfiguration of Mach kernel, we propose the modified data structure through the analysis of Mach kernel environments and scheduling. Third, we suggest the extended scheduling method by analyzing conventional Real-Time scheduling policies. Fourth, we implement the scheduler which executes tasks according to the Earliest-Deadline-First scheduling and the Rate Monotonic scheduling.

  • PDF

An Efficient Scheduling Method based on Dynamic Voltage Scaling for Multiprocessor System (멀티프로세서 시스템을 위한 동적 전압 조절 기반의 효율적인 스케줄링 기법)

  • Noh, Kyung-Woo;Park, Chang-Woo;Kim, Seok-Yoon
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.57 no.3
    • /
    • pp.421-428
    • /
    • 2008
  • The DVS(Dynamic Voltage Scaling) technique is the method to reduce the dynamic energy consumption. As using slack times, it extends the execution time of the big load operations by changing the frequency and the voltage of variable voltage processors. Researches, that controlling the energy consumption of the processors and the data transmission among processors by controlling the bandwidth to reduce the energy consumption of the entire system, have been going on. Since operations in multiprocessor systems have the data dependency between processors, however, the DVS techniques devised for single processors are not suitable to improve the energy efficiency of multiprocessor systems. We propose the new scheduling algorithm based on DVS for increasing energy efficiency of multiprocessor systems. The proposed DVS algorithm can improve the energy efficiency of the entire system because it controls frequency and voltages having the data dependency among processors.

Performance Analysis of Packet Scheduling Algorithm Based on Delay and Fairness (지연과 공정성을 고려한 패킷 스케쥴링 알고리즘 성능분석)

  • Lim Seog-Ku
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.6 no.6
    • /
    • pp.513-520
    • /
    • 2005
  • High-speed Portable Internet system provides 1-3 Mbps data transmission speed to terminals moving up to 60 km/sec. Since High-speed Portable Internet system supports services requiring different QoS, it needs an efficient scheduling method based on those different QoSs. This paper shows the performance comparisons of several different packet scheduling schemes for minimizing the mean delay over the downlink of High-speed Portable Internet system to support the packet data service. Simulation results show that proposed scheme superior to other schemes at side throughput and data loss rate.

  • PDF

A switching-based delay optimal aggregation tree construction: An algorithm design (에이전트 시스템 개발도구에 관한 연구)

  • Nguyen, Dung T.;Yeom, Sanggil;Choo, Hyunseung
    • Proceedings of the Korea Information Processing Society Conference
    • /
    • 2017.04a
    • /
    • pp.677-679
    • /
    • 2017
  • Data convergecast is an indispensable task for any WSN applications. Typically, scheduling in the WSN consists of two phases: tree construction and scheduling. The optimal tree structure and scheduling for the network is proven NP-hard. This paper focuses on the delay optimality while constructing the data convergecast tree. The algorithm can take any tree as the input, and by performing the switches (i.e. a node changes its parent), the expected aggregation delay is potentially reduced. Note that while constructing the tree, only the in-tree collisions between the child nodes sending data to their common parent is considered.

A Minimal Constrained Scheduling Algorithm for Control Dominated ASIC Design (Control Dominated ASIC 설계를 위한 최소 제한조건 스케쥴링 알고리즘)

  • In, Chi-Ho
    • The Transactions of the Korea Information Processing Society
    • /
    • v.6 no.6
    • /
    • pp.1646-1655
    • /
    • 1999
  • This thesis presents a new VHDL intermediate format CDDG(Control Dominated Data Graph) and a minimal constrained scheduling algorithm for an optimal control dominated ASIC design. CDDG is a control flow graph which represents conditional branches and loops efficiently. Also it represents data dependency and such constraints as hardware resource and timing. In the proposed scheduling algorithm, the constraints using the inclusion and overlap relation among subgraphs. The effectiveness of the proposed algorithm has been proven by the experiment with the benchmark examples.

  • PDF

Global Transaction Scheduling for One-Copy Quasi-Serializability with Secure Properties (보안성을 갖는 1-사본 준직렬성을 위한 전역트랜잭션 스케쥴링)

  • Jeong, Hyun Cheol
    • Journal of Korea Society of Digital Industry and Information Management
    • /
    • v.5 no.4
    • /
    • pp.99-108
    • /
    • 2009
  • In the security environments of heterogeneous multidatabase systems, not only the existing local autonomy but also the security autonomy as a new constraint are required. From global aspects, transactions maintain consistent data value when they assure serializability. Also, secure properties must protect these transactions and data values to prevent direct or indirect information effluence. This paper proposes scheduling algorithm for global transactions to ensure multilevel secure one-copy quasi-serializability (MLS/1QSR) in security environments of multidatabase systems with replicated data and proves its correctness. The proposed algorithm does not violate security autonomy and globally guarantees MLS/1QSR without indirect information effluence in multidatabase systems.

Resource Management Strategies in Fog Computing Environment -A Comprehensive Review

  • Alsadie, Deafallah
    • International Journal of Computer Science & Network Security
    • /
    • v.22 no.4
    • /
    • pp.310-328
    • /
    • 2022
  • Internet of things (IoT) has emerged as the most popular technique that facilitates enhancing humans' quality of life. However, most time sensitive IoT applications require quick response time. So, processing these IoT applications in cloud servers may not be effective. Therefore, fog computing has emerged as a promising solution that addresses the problem of managing large data bandwidth requirements of devices and quick response time. This technology has resulted in processing a large amount of data near the data source compared to the cloud. However, efficient management of computing resources involving balancing workload, allocating resources, provisioning resources, and scheduling tasks is one primary consideration for effective computing-based solutions, specifically for time-sensitive applications. This paper provides a comprehensive review of the source management strategies considering resource limitations, heterogeneity, unpredicted traffic in the fog computing environment. It presents recent developments in the resource management field of the fog computing environment. It also presents significant management issues such as resource allocation, resource provisioning, resource scheduling, task offloading, etc. Related studies are compared indifferent mentions to provide promising directions of future research by fellow researchers in the field.

DEVS 형식론을 이용한 다중프로세서 운영체제의 모델링 및 성능평가

  • 홍준성
    • Proceedings of the Korea Society for Simulation Conference
    • /
    • 1994.10a
    • /
    • pp.32-32
    • /
    • 1994
  • In this example, a message passing based multicomputer system with general interdonnedtion network is considered. After multicomputer systems are developed with morm-hole routing network, topologies of interconecting network are not major considertion for process management and resource sharing. Tehre is an independeent operating system kernel oneach node. It communicates with other kernels using message passingmechanism. Based on this architecture, the problem is how mech does performance degradation will occur in the case of processor sharing on multicomputer systems. Processor sharing between application programs is veryimprotant decision on system performance. In almost cases, application programs running on massively parallel computer systems are not so much user-interactive. Thus, the main performance index is system throughput. Each application program has various communication patterns. and the sharing of processors causes serious performance degradation in hte worst case such that one processor is shared by two processes and another processes are waiting the messages from those processes. As a result, considering this problem is improtant since it gives the reason whether the system allows processor sharingor not. Input data has many parameters in this simulation . It contains the number of threads per task , communication patterns between threads, data generation and also defects in random inupt data. Many parallel aplication programs has its specific communication patterns, and there are computation and communication phases. Therefore, this phase informatin cannot be obtained random input data. If we get trace data from some real applications. we can simulate the problem more realistic . On the other hand, simualtion results will be waseteful unless sufficient trace data with varisous communication patterns is gathered. In this project , random input data are used for simulation . Only controllable data are the number of threads of each task and mapping strategy. First, each task runs independently. After that , each task shres one and more processors with other tasks. As more processors are shared , there will be performance degradation . Form this degradation rate , we can know the overhead of processor sharing . Process scheduling policy can affects the results of simulation . For process scheduling, priority queue and FIFO queue are implemented to support round-robin scheduling and priority scheduling.

  • PDF

Network scheduling algorithm for field bus system (필드 버스 시스템을 위한 네트웍 스케쥴링 알고리즘)

  • 추성호;김일환
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 1996.10b
    • /
    • pp.1348-1351
    • /
    • 1996
  • In field bus network, field device are connected with a medium. Because a medium must be shared for transmitting data, there are random delay time when data arrive destination station. It is difficult that all data packets are guaranteed synchronization and real-time restriction. In this paper, we show an algorithm that makes network utilization to maximum, guarantees real-time restriction, calculates sampling time at all control loop.

  • PDF

A Hardware Allocation Algorithm for Data Path Synthesis (데이터 경로 합성을 위한 하드웨어 할당 알고리즘)

  • 김홍식;경종민
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.27 no.8
    • /
    • pp.1303-1310
    • /
    • 1990
  • This paper describes the design and implementation of a system for automatic data path synthesis in digital system. There are four subtasks to synthesize a digital system: scheduling, register allocation, functional unit allocation and bus allocation. In this paper, force directed algorithm is used for the scheduling while new algorithms are proposed for the allocation subtasks. Synthesis results of two experimental data paths including MC6502 have shown that our proposed algorithm out goes most of previous works.

  • PDF