Journal of the Korean Institute of Telematics and Electronics (대한전자공학회논문지)
- Volume 27 Issue 8
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- Pages.1303-1310
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- 1990
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- 1016-135X(pISSN)
A Hardware Allocation Algorithm for Data Path Synthesis
데이터 경로 합성을 위한 하드웨어 할당 알고리즘
Abstract
This paper describes the design and implementation of a system for automatic data path synthesis in digital system. There are four subtasks to synthesize a digital system: scheduling, register allocation, functional unit allocation and bus allocation. In this paper, force directed algorithm is used for the scheduling while new algorithms are proposed for the allocation subtasks. Synthesis results of two experimental data paths including MC6502 have shown that our proposed algorithm out goes most of previous works.
Keywords