• Journal of Advanced Navigation Technology
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• v.21 no.4
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• pp.386-393
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• 2017

Field programmable gate arrays (FPGAs) are widely used for verification in chip development. In order to verify the circuit programmed to the FPGA, data must be input to the FPGA. There are many ways to communicate with a chip through a PC and an external board, but the simplest and easiest way is to use a universal asynchronous receiver/transmitter (UART). Most recently, most circuits are designed to be internally connected to the advanced microcontroller bus architecture (AMBA) bus. In other words, to verify the designed circuit easily and simply, data must be transmitted through the AMBA bus through the UART. Also the AMBA bus has been available in various versions since version 4.0 recently. Advanced peripheral bus (APB) is suitable for simple testing. In this paper, we design a circuit for UART-to-APB interface. Circuits designed using Verilog-HDL were implemented in Altera Cyclone FPGAs and were capable of operating at speeds up to 380 MHz.

• Journal of IKEEE
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• v.23 no.4
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• pp.1469-1472
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• 2019

CAN bus in automotive applications does not assign node addresses. When a node is hacked and it transmits malicious data frame, it is difficult to resolve which node is hacked. However, this CAN bus internal attack seriously threatens the safety of a car, so a prompt counterattack is necessary in the CAN bus physical layer. This paper proposes a counterattack method against malicious CAN bus internal attack. When a malicious data frame is detected, an intrusion detection system in the CAN bus increases the error counter of the malicious node. Then, the malicious node is off from the bus when its error counter exceeds its limit. A CAN controller with the proposed method is implemented in Verilog HDL, and the proposed method is proved to counterattack against malicious CAN bus internal attack.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.7 no.2
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• pp.1-12
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• 2008

Recently, the roll of bus transit is critical more than before because of the dramatical increase in congestions and oil prices, but bus companies seriously encounter into vicious circle situation such as decrease in passenger demand, income reduction, and revenue deterioration. To tackle this, major metropolitan cities, Seoul, Busan, DaeGu, etc. have introduced a semi-public system to reinforce public function of bus. However, it was resulted in side effects that the main board of bus company did not control theirselves voluntarily, and the management and control of public sectors on bus become very important elements. In this research, the types, limitations, and development of operation-management items, and a methodology for analysis, and changes in those trends are addressed under semi-public system using APTS data. Conclusively, this study could be one of the useful application results and alternatives for the operation-management policy of bus transit-related agencies.

• Journal of Korean Society of Transportation
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• v.33 no.2
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• pp.170-181
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• 2015

This study explores passengers' travel characteristics at six bus stops on the Seoul Ring Expressway using smart traffic card data. Based on the characteristics, political strategies to improve bus facilities on expressway are suggested. Firstly, among them two bus stops of Guri and Uiwang-Cheonggye have higher transfer rate of passengers, 37.56% and 36.9% of the total intercity (red) bus passengers on the expressway, respectively. Secondly, Uiwang-Cheonggye bus stop has the highest transfer rate, and Guri bus stop has also higher transfer rate and the highest on-and-off passengers. It implies that both bus stops need to be prioritized for improving bus stop facility, access roads, and connection facility between the bi-directional stops. Thirdly, Guri (down) bus stop has relatively longer waiting time for transfer, thus shorter bus headways running the bus stop should be considered. Lastly, most passengers using both stops come to and from Bundang-gu in Geongnam City. Overall, the results of this study would be helpful for transport planners to develop effective bus route policies and bus operation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.8
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• pp.1653-1658
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• 2009

SoC(System on a Chip) has several masters, slaves, arbiter and decoder in bus architecture. Master initiates the data transactions like CPU, DMA and DSP and slave responses the data transactions like SRAM, SDRAM and register. Furthermore, as multiple masters can't use a bus concurrently, arbiter plays an role in bus arbitration. In compliance with the selection of arbitration method, SoC performance can be changed definitely. In this study, we compare the characteristics of various arbitration policies using TLM(Transaction Level Model) method. Fixed priority, round-robin, TDMA and Lottery bus policies are used in general arbitration method. We analyze the merit and demerit of these arbitration policies.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.9
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• pp.26-32
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• 2008

The conventional shared bus architecture is capable of processing only one data transaction in same time. In this paper, we propose the NAWM (No Arbitration Wild Master) bus architecture that is capable of processing several data transactions in same time. After designing the master and the slave wrappers of NAWM bus architecture about AMBA system, we confirm that most of IPs of AMBA system can be a lied without modification and the added timing delay can be neglected. from simulation we deduce that more than 50% parallel processing is possible when several masters initiate slaves in NAWM bus architecture.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.2
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• pp.50-56
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• 2009

SoC(System on a Chip) has several masters, slaves, arbiter and decoder in bus architecture. Master initiates the data transactions like CPU, DMA and DSP and slave responses the data transactions like SRAM SDRAM and register. Furthermore, as multiple masters can't use a bus concurrently, arbiter plays an role in bus arbitration. In compliance with the selection of arbitration method, SoC performance can be changed definitely. Fixed priority, round-robin, TDM arbitration are used in general arbitration method, In this study, we compose TLM algorithm and analyze general arbitration methods through TLM simulation. Consequently, we propose the hybrid bus arbitration policy and verify the performance, compared with the other arbitration methods.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.32 no.3D
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• pp.213-222
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• 2012

After enforcing 2007 semi-public management system of intra-city bus, Busan city has tried to promote the bus utilization through bus service improvements. As an effort for this, we attempted to clarify the main factors affecting to bus service satisfaction targeting intra-city bus users. In this study, 20 subcategories of intra-city bus service were assorted into 6 factors: Basic Service, Safe Driving, Route Information, Comfort, Cleanliness and Facilities, then the preference for each detailed bus service were analyzed. And the effects for bus service satisfaction were shown under the various conditions according to the general characteristics of intra-city bus users (gender, age), behavioral traffic characteristics (frequency of use, boarding time) and transportation environments (temperature, rainfall). These results would be important basic data for decision-making in bus policy for climate change and establishment of operating plan for bus utilization.

• Journal of Korean Society of Transportation
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• v.27 no.1
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• pp.63-71
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• 2009

The purpose of this paper is to identify unreliable routes in the view of users. After headway error ratio per route and travel time error ratio per route were calculated by using BMS data, reliability which incorporated two indicators each route was calculated through data envelopment analysis. Reliability among routes and among traffic zones was compared through the results, the needs to improve severely unreliable routes and to show passengers adjusted bus schedule information considering current reliability were suggested. As a future study, reliability evaluation framework of each route needs to be developed considering operation environment by analyzing bus card data (passengers and operation speed etc.) and pooly unreliable route should be managed strictly and reformed.

• Journal of Institute of Control, Robotics and Systems
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• v.20 no.6
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• pp.689-694
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• 2014

An SPLC (Safety Programmable Logic Controller) must be designed to meet the highest safety standards, IEEE 1E, and should guarantee a level of fault-tolerance and high-reliability that ensures complete error-free operation. In order to satisfy these criteria, I/O modules, communication modules, processor modules and bus modules of the SPLC have been configured in triple or dual modular redundancy. The redundant modules receive the same data to determine the final data by the voting logic. Currently, the processor of each rx module performs the voting by deciding on the final data. It is the intent of this paper to prove the improvement on the current system, and develop a voting system for multiple data on a system bus level. The new system bus protocol is implemented based on a TCN-MVB that is a deterministic network consisting of a master-slave structure. The test result shows that the suggested system is better than the present system in view of its high utilization and improved performance of data exchange and voting.