• Journal of IKEEE
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• v.6 no.1 s.10
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• pp.1-9
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• 2002

Converged LAN accepts diverse traffics so that performance analysis is very important for successful development of converged LAN. In this paper, we develop simulation program using SALM II and simulate queue management scheme and scheduling algorithm for converged LAN. The result of simulation shows the effect of performance for cyclic service algorithm larger than priority algorithm using weight. And queue management can be easy by implementation of Back Pressure scheme.

• Journal of Computing Science and Engineering
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• v.7 no.1
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• pp.67-80
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• 2013

The worst-case execution time (WCET) of each real-time task in multicore processors with shared caches can be significantly affected by inter-thread cache interferences. The worst-case inter-thread cache interferences are dependent on how tasks are scheduled to run on different cores. Therefore, there is a circular dependence between real-time task scheduling, the worst-case inter-thread cache interferences, and WCET in multicore processors, which is not the case for single-core processors. To address this challenging problem, we present an offline real-time scheduling approach for multicore processors by considering the worst-case inter-thread interferences on shared L2 caches. Our scheduling approach uses a greedy heuristic to generate safe schedules while minimizing the worst-case inter-thread shared L2 cache interferences and WCET. The experimental results demonstrate that the proposed approach can reduce the utilization of the resulting schedule by about 12% on average compared to the cyclic multicore scheduling approaches in our theoretical model. Our evaluation indicates that the enhanced scheduling approach is more likely to generate feasible and safe schedules with stricter timing constraints in multicore real-time systems.

• Journal of KIISE:Software and Applications
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• v.34 no.5
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• pp.487-501
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• 2007

To achieve high resource utilization for multi-issue DSPs, production compiler commonly includes variants of iterative modulo scheduling algorithm. However, excessive cyclic data dependences, which exist in communication and media processing loops, unduly restrict modulo scheduling freedom. As a result, replicated functional units in multi-issue DSPs are often under-utilized. To address this resource under-utilization problem, our paper describes a novel compiler preprocessing strategy for effective modulo scheduling. The preprocessing strategy proposed capitalizes on two new transformations, which are referred to as cloning and dismantling. Our preprocessing strategy has been validated by an implementation for StarCore SC140 DSP compiler.

• 제어로봇시스템학회:학술대회논문집
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• 1997.10a
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• pp.680-683
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• 1997

Fieldbus system should be designed by considering the number of sensors/actors(actuators+ controllers) and their sampling times. But the number of sensors/actors and which are connected to the network bus can be varied by addition and/or fault of the field devices. That variation decreases the efficiency of system which is off-line designed optimally. This paper proposes an algorithm that ensures transmission of cyclic data even though there is the number change in the field devices. We assign the different weight values to cyclic data and acyclic data. By simulation and experiment, the cyclic and acyclic data are processed via the proposed network, and the results are compared with those of the Profibus system. It is shown that the proposed algorithm is more robust with the uncertainties of the field devices of the control system.

• Journal of the Korea Society of Computer and Information
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• v.19 no.1
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• pp.1-8
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• 2014

In recent years, much attention has been paid to the development of intelligent vehicles that integrate automotive technology into the information technology, with the aim of improving user friendliness and stability. The representative function is a autonomous driving and a cruise control. In designing such vehicles, it is critical to address the real-time issues (i.e., real-time vehicle control and timely response). However, previous research excluded the real-time scheduling. We develop a model car with unmanned cruise control, design the real-time scheduler using cyclic executive to easily adapt the model car, and provide some insight into potential solutions based on various experiments.

• ETRI Journal
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• v.29 no.3
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• pp.259-269
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• 2007

The ubiquitous flexible operating system (UbiFOS) is a real-time operating system designed for cost-conscious, low-power, small to medium-sized embedded systems such as cellular phones, MP3 players, and wearable computers. It offers efficient real-time operating system services like multi-task scheduling, memory management, inter-task communication and synchronization, and timers while keeping the kernel size to just a few to tens of kilobytes. For flexibility, UbiFOS uses various task scheduling policies such as cyclic time-slice (round-robin), priority-based preemption with round-robin, priority-based preemptive, and bitmap. When there are less than 64 tasks, bitmap scheduling is the best policy. The scheduling overhead is under 9 ${\mu}s$ on the ARM926EJ processor. UbiFOS also provides the flexibility for user to select from several inter-task communication techniques according to their applications. We ported UbiFOS on the ARM9-based DVD player (20 kB), the Calm16-based MP3 player (under 7 kB), and the ATmega128-based ubiquitous sensor node (under 6 kB). Also, we adopted the dynamic power management (DPM) scheme. Comparative experimental results show that UbiFOS could save energy up to 30% using DPM.

• Journal of Korean Institute of Industrial Engineers
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• v.28 no.4
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• pp.415-424
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• 2002

Semiconductor manufacturing has been emerged as a highly competitive but profitable business. Accordingly it becomes very important for semiconductor manufacturing companies to meet customer demands at the right time, in order to keep the leading edge in the world market. However, due-date oriented production is very difficult task because of the complex job flows with highly resource conflicts in fabrication shop called FAB. Due to its cyclic manufacturing feature of products, to be completed, a semiconductor product is processed repeatedly as many times as the number of the product manufacturing cycles in FAB, and FAB processes of individual manufacturing cycles are composed with similar but not identical unit processes. In this paper, we propose a production scheduling and control scheme that is designed specifically for semiconductor scheduling environment (FAB). The proposed scheme consists of three modules: simulation module, cycle due-date estimation module, and dispatching module. The fundamental idea of the scheduler is to introduce the due-date for each cycle of job, with which the complex job flows in FAB can be controlled through a simple scheduling rule such as the minimum slack rule, such that the customer due-dates are maximally satisfied. Through detailed simulation, the performance of a cycle due-date based scheduler has been verified.

• Journal of KIISE:Computer Systems and Theory
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• v.27 no.5
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• pp.450-463
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• 2000

Array redistribution is usually required to enhance algorithm performance in many parallel programs on distributed memory multicomputers. GEN_BLOCK redistribution, which is redistribution between different GEN_BLOCKs, is essential for load balancing. However, prior research on redistribution has been focused on regular redistribution, such as redistribution between different CYCLIC(N)s. GEN_BLOCK redistribution is very different from regular redistribution. Message passing in regular redistribution involves repetitions of basic message passing patterns, while message passing for GEN_BLOCK redistribution shows locality. This paper proves that two optimal condition, reducing the number of communication steps and minimizing redistribution size, are essential in GEN_BLOCK redistribution. Additionally, by adding a relocation phase to list scheduling, we make an optimal scheduling algorithm for GEN_BLOCK redistribution. To evaluate the performance of the algorithm, we have performed experiments on a CRAY T3E. According to the experiments, it was proven that the scheduling algorithm shows better performance and that the conditions are critical in enhancing the communication speed of GEN_BLOCK redistribution.

• Proceedings of the KSR Conference
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• 1999.11a
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• pp.46-53
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• 1999

As of July 1999, i,185 lomocotives(excluding metropolitan area electric locomotives) are in Korean National Railroad(KNR). With this limited number of resources assigning locomotives to each trains of timetable is very important in the entire railway management point of view because schedule can be regarded as goods in transportation industry. On a simple rail network, it is rather easier to assign proper locomotives to trains with the experience of operating experts and get optimal assignment solution. However, as the network is getting bigger and complicated, the number of trains and corresponding locomotives will be dramatically increased to rover all the demands required to service all of the trains in timetable. There will be also numerous operational constraints to be considered. Assigning proper locomotives to trains and building optimal cyclic rotations of locomotive routings will result in increasing efficiency of schedule and giving a guarantee of more profit. The purpose of this study is two fold: (1) we consider a planning-level locomotive scheduling problem with the objective of minimizing the wasting cost under various practical constraints and (2) development of implementation prototype program of its assigning result. Not like other countries, i.e. Canada, Sweden, Korean railroad operates on n daily schedule basis. The objective is to find optimal assignment of locomotives of different types to each trains, which minimize the wasting cost. This problem is defined on a planning stage and therefore, does not consider operational constraints such as maintenance and emergency cases. Due to the large scale of the problem size and complexity, we approach with heuristic methods and column generation to find optimal solution. The locomotive scheduling prototype consists of several modules including database, optimization engine and diagram generator. The optimization engine solves MIP model and provides an optimal locomotive schedule using specified optimization algorithms. A cyclic locomotive route diagram can be generated using this optimal schedule through the diagram generator.

• Proceedings of the Korea Committee for Ocean Resources and Engineering Conference
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• 2004.05a
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• pp.61-66
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• 2004

In this paper an effort is made to develop an innovative spatial arrangement concept pertaining to ship building industry. The spatial scheduling is the problem that concentrates on effective planning of available space and arrangements of blocks and in a priority manner. In order to create an effective spatial scheduling. a database providing the priority has to be available to make the erection sequence. Such a system works hand in hand with erection sequence generator program The erection sequence program works on the conventional network analysis method which uses a typical parent-children idea for the calculation of the ENT(possible earliest network start time) and LNT(possible latest network start time). This program works in a cyclic manner taking turns by calculating the ENT in upward trace and LNT on the return trace thereby generating the entire erection sequence diagram for the requisite problem The generated database serves as an input data for spatial scheduling problem. When the system works it takes into consideration the entire system based on heuristic concepts as mentioned. There system uses the spatial aspects such as the available area of the P. E area and plan area of the corresponding blocks and its priority of erection from the erection sequence generator program develops the spatial scheduling arrangement. In this paper using all these concepts an innovative spatial schedule development system developed.