• 전기학회논문지P
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• 제51권4호
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• pp.186-192
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• 2002

In this paper, interleaved boost power factor corrector(IBPFC) is applied as a pre-regulator in switch mode power supply. IBPFC can reduce input current ripple and effectively increase the switching frequency without increasing the switching losses, because input current is divided each 50% by two switching devices. IBPFC can be classified as three cases by duty ratio condition in continuous current mode and be carried out state space average modeling. According to the modeling, steady and transient state analysis is performed by steady elements and perturbation element. Control transfer function is derived for design of control system.

• Journal of Power Electronics
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• 제12권5호
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• pp.689-698
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• 2012

This paper investigates the effects of applying different input current waveshapes on the performance of a continuous-conduction-mode (CCM) power-factor-correction (PFC) boost pre-regulator. It is found that the output voltage ripple of the pre-regulator can be reduced if the input current is modified to include controlled amount of higher order harmonics. This finding allows us to balance the performance of output regulation and the harmonic current emission when coming to the design of the pre-regulator. An experimental PFC boost pre-regulator prototype is constructed to verify the analysis and show the benefit of the pre-regulator operating with input current containing higher order harmonics.

• 한국정보통신학회논문지
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• 제13권9호
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• pp.1837-1844
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• 2009

본 논문에서는 전류모드 CMOS에 의한 2변수 3치 가산기 회로와 승산기 회로를 구현하였다. 제시된 전류모드 CMOS에 의한 3치 가산기 회로와 승산기 회로는 전압 레벨로 동작하며, HSpice 시뮬레이션을 통하여 이 회로들에 대하여 동작 특성을 보였다. 제시 된 회로들은 $0.180{\mu}m$ CMOS 표준 기술을 사용하여 HSpice로 시뮬레이션 하였다. 2 변수 3치 가산기 및 승산기 회로의 단위 전류 $I_u$는 $5{\mu}A$로 하였으며, NMOS의 길이와 폭 W/L는 $0.54{\mu}m/0.18{\mu}m$이고, PMOS의 길이와 폭 W/L는 $1.08{\mu}m/0.18{\mu}m$이다. VDD 전압은 2.5V를 사용하였으며 MOS 모델은 LEVEL 47으로 시뮬레이션 하였다. 전류모드 CMOS 3치 가산기 및 승산기 회로의 시뮬레이션 결과에서 전달 지연 시간이 $1.2{\mu}s$이며, 3치 가산기 및 승산기 회로가 안정하게 동작하여 출력 신호를 얻는 동작 속도가 300MHz, 소비 전력이 1.08mW임을 보였다.

• Transactions on Electrical and Electronic Materials
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• 제11권1호
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• pp.24-28
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• 2010

A simulation study of a current-mode direct current (DC)-DC buck converter is presented in this paper. The converter, with a fully integrated power module, is implemented by using sense method metal-oxide-semiconductor field-effect transistor (MOSFET) and bipolar complementary metal-oxide-semiconductor (BiCMOS) technology. When the MOSFET is used in a current sensor, the sensed inductor current with an internal ramp signal can be used for feedback control. In addition, the BiCMOS technology is applied in the converter for an accurate current sensing and a low power consumption. The DC-DC converter is designed using the standard $0.35\;{\mu}m$ CMOS process. An off-chip LC filter is designed with an inductance of 1 mH and a capacitance of 12.5 nF. The simulation results show that the error between the sensing signal and the inductor current can be controlled to be within 3%. The characteristics of the error amplification and output ripple are much improved, as compared to converters using conventional CMOS circuits.

• 한국초전도ㆍ저온공학회논문지
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• 제11권1호
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• pp.30-34
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• 2009

This paper deals with charging and persistent-current mode operating characteristics of BSCCO magnet load using high-temperature superconducting (HTS) power supply. The HTS power supply consists of two heater-triggered switches, an iron-core transformer with the primary copper winding and the secondary BSCCO solenoid, and a BSCCO magnet load. The magnet load was fabricated by double pancake winding and its inductance is about 21 mH. A hall sensor was installed at the middle of the magnet load to measure the current in the load. In order to investigate the efficient pumping characteristics, operating tests of heater-triggered switch with respect to dc heater current were carried out, and the electromagnet current was determined by considering saturation characteristics of its iron core. The saturation characteristics of charged current in the magnet load were observed with respect to various pumping periods: 12 s, 14 s, 24 s and 32 s. After charging the magnet load, the persistent current was measured. The operating characteristics of the persistent current mode were mainly determined by joint resistance and magnet load.

• 조명전기설비학회논문지
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• 제19권8호
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• pp.116-121
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• 2005

전류모드 아날로그 회로를 이용하여 FIR(Finite Impulse Response) 필터를 설계하는 경우에 tap coefficient와 전류모드 FFT(Fast Fourier Transform) LSI의 회전인자(twiddle factor)를 실현시키기 위해서는 높은 정밀도를 갖는 전류 감쇠 회로가 필요하게 된다. 본 논문은 전류 모드 신호처리 기술에서 전류감쇠 회로의 감쇠 정밀도를 향상시킬 수 있는 기술을 소개하고자한다. 먼저 게이트 길이 비율을 조정하는(gate-ratioed) Current Mirror 회로를 사용하는 기존의 전류 감쇠 조정회로에 있어서의 DC offset 전류 에러에 대하여 분석하였으며, 다음으로 DC offset 전류 에러를 제거할 수 있는 전류감쇠 회로를 제안하였다. 회로 구성은 입력 전류를 1/N로 감쇠시킬 수 있도록 N개의 Current Mirror를 병렬로 연결하는 기본 구성을 하였으며, Kirchhoff 전류 법칙에 근거하여, 전류 감쇠가 결정되도록 설계하였다. 또한 Current Mirror 회로에서, 정전류원의 사용을 줄일 수 있는 회로설계를 제안하였다. 제안된 전류 감쇠 회로에서 정밀도는 Current Mirror의 ac 이득 에러에 의하여 제한되며 High Swing Current Mirror를 기본 Current Mirror로 사용한 경우에, 최대 정밀도는 이론상 입력 전류의 -80[dB]까지 실현가능하다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2011년도 전력전자학술대회
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• pp.429-430
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• 2011

This paper presents a simple and cost-effective stand-alone rapid battery charging system of 30kW for electric vehicles. The proposed system mainly consists of active front-end rectifier of neutral point clamped 3-level type and non-isolated bi-directional dc-dc converter of multi-phase interleaved half-bridge topology with coupled inductors. The charging system is designed to operate for both lithium-polymer and lithium-ion batteries. The complete charging sequence is made up of three sub-interval operating modes; pre-charging mode, constant-current mode, and constant-voltage mode. The pre-charging mode employs the staircase shaped current profile to accomplish shorter charging time while maintaining the reliable operation of the battery. The proposed system is able to reach the full-charge state within less than 16min for the battery capacity of 8kWh by supplying the charging current of 67A. The optimal discharging algorithm for Vehicle to the Grid (V2G) operation has been adopted to maintain the discharging current of 1C. Owing to the simple and compact power conversion scheme, the proposed solution has superior module-friendly mechanical structure which is absolutely required to realize flexible power expansion capability in a very high-current rapid charging system.

• 전력전자학회논문지
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• 제22권5호
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• pp.440-448
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• 2017

This paper proposes a controller design of a distributed source inverter in stand-alone mode or grid-connected mode to compensate the current or voltage harmonics caused by local nonlinear load. The PR-based multi loop controller has been used to improve the dynamic performance of the system and to compensate the output voltage or grid current harmonics. The multi-loop controller consists of an outer current controller and an inner voltage controller for the output voltage control in stand-alone mode. In grid-connected mode, an outer current controller is added to the output voltage controller for the grid current control. The design performance of each controller is described through the Root locus and Bode plot of the transfer functions. The validity of the proposed control algorithm and design parameters has been verified through the PSiM simulation and experimental results.

• Journal of Power Electronics
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• 제11권5호
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• pp.639-654
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• 2011

This paper presents a Current Distribution Control design for Paralleled Positive Output Elementary Super Lift Luo Converters (PPOESLLCs) operated in Continuous Conduction Mode using a Sliding Mode Controller (SMC). Manipulating the higher current requirement of the load through the paralleling of POESLLCs, results in a current inequality. This is mainly due to dissimilarities in the power semiconductor switches and circuit components used in POESLLCs, which may lead to converter failures. In order to balance the proper load current sharing and the load voltage regulation of PPOESLLCs, a SMC is developed. The SMC is designed for the inherently variable-structured of POESLLCs by using the state-space average based model. The static and dynamic performance of the developed controller with PPOESLLCs is validated for its robustness to perform over a wide range of operating conditions through both a laboratory prototype and MatLab/Simulink models, which are compared with a Proportional-Integral (PI) controller. Theoretical analysis, simulation and experimental results are presented to demonstrate the feasibility of the developed SMC along with the complete design procedure.

• 한국위성정보통신학회논문지
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• 제7권2호
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• pp.72-75
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• 2012

저궤도 인공위성에 사용되는 태양전력 조절기는 태양전지의 영향으로 일반적인 DC-DC 컨버터와는 다른 소신호 특성을 갖는다. 이로 인하여 벅-부스트 형 태양전력 조절기는 태양전지의 전류원 영역에서 평균전류모드제어가 불가능하다. 이 논문에서는 벅-부스트 형 태양전력 조절기를 의사-연속전류모드로 동작시켜 태양전지의 전 영역에서 태양전력조절기를 평균전류모드 단일 제어한다. 우선 의사-연속전류모드 벅-부스트 형 태양전력 조절기의 회로 동작을 설명하고, 소신호 전달함수를 구하고 이를 바탕으로 평균전류모드제어기를 구성한다. 최종적으로 모의실험을 통하여 의사-연속전류모드 벅-부스트 형 태양전력 조절기의 평균모드제어를 검증한다.