• 한국표면공학회지
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• 제40권5호
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• pp.203-208
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• 2007

Preliminary studies were conducted to develop a dimensionally stable anode (DSA)electrode prepared by reactive sputtering method. The microstructure, surface morphology and electrochemical properties of iridium oxide $(IrO_2)$ coatings synthesized by unbalanced magnetron sputtering (UBMS) and conventional DSA electrode were compared. In addition, the possibilities of $IrO_2$ films synthesized by UMB on a real DSA electrode were investigated by electro-chemical application test. The degree of non-stoichiometry and surface area were closely related to the electro-chemical activity of the $IrO_2$ electrode. The feasibility of making a DSA electrode prepared by PVD technique was demonstrated through the present work.

• 한국전기전자재료학회논문지
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• 제16권9호
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• pp.765-770
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• 2003

We have developed a low-temperature, and low-pressure radical induced oxidation (RIO) technology, so that high-quality ultrathin silicon dioxide layers have been effectively produced with a high reproducibility, and successfully employed to realize high performace SiGe heterostructure complementary MOSFETs (HCMOS) lot the first time. The obtained oxide layer showed comparable leakage and breakdown properties to conventional furnace gate oxides, and no hysteresis was observed during high-frequency capacitance-voltage characterization. Strained SiGe HCMOS transistors with a 2.5 nm-thick gate oxide layer grown by this method exhibited excellent device properties. These suggest that the present technique is particularly suitable for HCMOS devices requiring a fast and high-precision gate oxidation process with a low thermal budget.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 추계학술대회 논문집
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• pp.330-333
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• 2005

The fabrication of mold fur nano imprint lithography (NIL) is experimentally reported using the scanning probe lithography (SPL) technique, instead of the conventional I-beam lithography technique. The nanometer scale patterning structure is fabricated by the localized generation of oxide patterning on the silicon (100) wafer surface with a thin oxide layer, The fabrication method is based on the contact mode of scanning probe microscope (SPM) in air, The precision cleaning process is also performed to reach the low roughness value of $R_{rms}=0.084 nm$, which is important to increase the reproducibility of patterning. The height and width of the oxide dot are generated to be 15.667 nm and 209.5 nm, respectively, by applying 17 V during 350 ms.

• 한국세라믹학회지
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• 제29권12호
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• pp.963-969
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• 1992

This paper describes the feasibility for a direct production of zinc oxalate powders from zinc-loaded D2EHPA solutions combining the purification and the precipitation in one operation unit. This process has the potential as an alternative to conventional method for the synthesis of zinc oxide precursor particles from the hydrometal-lurgical processes. Zinc was extracted into D2EHPA in kerosene and then zinc-loaded D2EHPA solution was emulsified with oxalic acid-HCl solution to precipitate zinc oxalate powder, which was readily calcined to zinc oxide. The precipitation kinetics and yield were sensitive to experimental conditions. The morphology, size and size distribution of the zinc oxalate powders varied with zinc/oxalate ion riatio, temperature, and the presence of SPAN 60, which affected nucleation, growth, and the emulsion characteristics.

• KIEE International Transactions on Electrophysics and Applications
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• 제3C권1호
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• pp.28-32
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• 2003

In this paper, we have studied the in-situ end point detection (EPD) for direct chemical mechanical polishing (CMP) of shallow trench isolation (STI) structures without the reverse moat etch process. In this case, we applied a high selectivity $1n (HSS) that improves the silicon oxide removal rate and maximizes oxide to nitride selectivity Quite reproducible EPD results were obtained, and the wafer-to-wafer thickness variation was significantly reduced compared with the conventional predetermined polishing time method without EPD. Therefore, it is possible to achieve a global planarization without the complicated reverse moat etch process. As a result, the STI-CMP process can be simplified and improved using the new EPD method.

• 한국전기전자재료학회논문지
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• 제16권5호
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• pp.372-377
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• 2003

To realize a high integrated flash memory utilizing SONOS memory devices, the NOR type ITC(one Transistor Cell) SONOS flash arrays are fabricated and characterized. This SONOS flash arrays with the common source lines are designed and fabricated by conventional 0.35$\mu\textrm{m}$ CMOS process. The thickness of ONO for memory cells is tunnel oxide of 34${\AA}$, nitride of 73${\AA}$ and blocking oxide of 34${\AA}$ . To investigate operating characteristics, CHEI(Channel Hot Electron Injection) method and bit line method are selected as the program and 4he erase operation, respectively. The disturbance characteristics ,according to the program/erase/read cycling are also examined. The degradation characteristics are investigated and then the reliability of SONOS flash memory is guaranteed.

• 한국분말재료학회지
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• 제10권4호
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• pp.281-287
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• 2003

Ultrafine TiC-15%Co powders were synthesized by a thermochemical process, including spray drying, calcination, and carbothermal reaction. Ti-Co oxide powders were prepared by spray drying of aqueous solution of titanium chloride and $Ti(OH)_2$ slurry, both containing cobalt nitrate, fellowed by calcination. The oxide powders were mixed with carbon powder to reduce and carburize at 1100~125$0^{\circ}C$ under argon or hydrogen atmosphere. Ultrafine TiC particles were formed by carbothermal reaction at 1200~125$0^{\circ}C$, which is significantly lower than the formation temperature (~1$700^{\circ}C$) of TiC particles prepared by conventional method. The oxygen content of TiC-15%Co powder synthesized under hydrogen atmosphere was lower than that synthesized under argon, suggesting that hydrogen accelerates the reduction rate of Ti-Co oxides. The size of TiC-15%Co powder was evaluated by FE-SEM and TEM and Identified to be smaller than 300 nm.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 하계학술대회 논문집
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• pp.814-819
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• 2000

The progress in the field of electronic materials has been especially significant for applications involving a range of electrical properties. Its importance is increasing with the increasing demand for integrated circuits. The sol-gel technique has been used for many years, and the metal alkoxides have featured prominently as source materials. The method consist of making a homogeneous solution of the component metal alkoxides in a suitable solvent, usually the parent alcohol; and then causing the hydrolysis under controlled conditions to produce a gel containing the hydrated metal oxide. The gel is then dried, and fired to produce a ceramic or glassy material at a temperature much lower than that required by the conventional melting process. This project consists of important theoretical considerations, processing techniques and applications related to electrophoresis derived thin films. In the electrophoretic process a metal alkoxide solution is gelled through hydrolysis-polymerization and converted the gel thin layer to an oxide by heating at relatively low temperatures.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.181-184
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• 1999

This paper presents the accurate deembeding method for pad and parasitics of MOSFET device. rad effects are deembedded using THRU LINE, which is much simpler method without laborious fitting procedure compared with conventional OPEN and SHORT pad modeling. Parasitic resistance extraction uses the algebraic relation between increments of inversion layer charge and oxide capacitance. It is especially adequate for insulating gate junction device. Extracted parasitics are verified through comparing modeled and measured S parameters.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.278-278
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• 2016

Solution-processed metal-oxide semiconductors have been considered as the next generation semiconducting materials for transparent and flexible electronics due to their high electrical performance. Moreover, since the oxide semiconductors show high sensitivity to light illumination and possess persistent photoconductivity (PPC), these properties can be utilized in realizing optical memory devices, which can transport information much faster than the electrons. In previous works, metal-oxide semiconductors are utilized as a memory device by using the light (i.e. illumination does the "writing", no-gate bias recovery the "reading" operations) [1]. The key issues for realizing the optical memory devices is to have high photoconductivity and a long life time of free electrons in the oxide semiconductors. However, mono-layered indium-zinc-oxide (IZO) and mono-layered indium-gallium-zinc-oxide (IGZO) have limited photoconductivity and relaxation time of 570 nA, 122 sec, 190 nA and 53 sec, respectively. Here, we boosted up the photoconductivity and relaxation time using a double-layered IZO/IGZO active layer structure. Solution-processed IZO (top) and IGZO (bottom) layers are prepared on a Si/SiO2 wafer and we utilized the conventional thermal annealing method. To investigate the photoconductivity and relaxation time, we exposed 9 mW/cm2 intensity light for 30 sec and the decaying behaviors were evaluated. It was found that the double-layered IZO/IGZO showed high photoconductivity and relaxation time of 28 uA and 1048 sec.