• Title/Summary/Keyword: conventional oxide method

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Preventing a Gate Oxide Thinning in C-MOS process Using a Dual Gate Oxide (Dual Gate Oxide 공정에서 Gate Oxide Thinning 방지에 대한 고찰)

  • Kim, Sung-Hoan;Kim, Jae-Wook;Sung, Man-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07a
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    • pp.223-226
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    • 2003
  • We propose an improvement method for a $\underline{G}ate$ $\underline{OX}ide(GOX)$ thinning at the edge of $\underline{S}hallow$ $\underline{T}rench$ $\underline{I}solation(STI)$, when STI is adopted to Dual Gate Oxide(DGOX) Process. In the case of SOC(System On-a-Chip), the DGOX process is usually used for realizing both a low and a high voltage parts in one chip. However, it is found that the severe GOX thinning occurs from at STI top edge region and a dent profile exists at the top edge of STI, when conventional DGOX and STI process carried out in high density device chip. In order to overcome this problem, a new DGOX process is tried in this study. And we are able to prevent the GOX thinning by H2 anneal, partially SiN liner skip, and a method which is merged a thick sidewall oxide(S/O) with a SiN pull-back process. Therefore, a good subthreshold characteristics without a double hump is obtained by the prevention of a GOX thinning and a deep dent profile.

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Low Temperature Sintering and Dielectric Properties of $Sr_2$($Ta_{1-x}$$Nb_{x}$)$_2$$O_{7}$ Ceramics ($Sr_2$($Ta_{1-x}$$Nb_{x}$)$_2$$O_{7}$ 세라믹스의 저온소성과 유전특성)

  • 남효덕
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1994.11a
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    • pp.8-12
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    • 1994
  • Solid solutions $Sr_2$($Ta_{1-x}$$Nb_{x}$)$_2$$O_{7}$ (x = 0.0 - 1.0) composed of strontium-tantalate (low Curie temperature) and strontium-niobate (high Curie temperature) were prepared by the conventional mixed oxide method and the molten salt synthesis method (flux method). Phase relation, sintering temperature, grain-orientation and dielectric properties were investigated for sintered ceramic samples with different compositions. Both Curie temperature and dielectric constant at Curie temperature were increased, and sintering behavior and the degree of grain-orientation were improved with the increase of Nb content. Single phase $Sr_2$$Nb_2$$O_{7}$ powder was synthesized by using flux method at lower temperatures, and sintering temperature was also reduced by using flux method derived powder than using mixed-oxide derived powder. Sintering characteristics and dielectric properties of specimens prepared by flux method were better than those derived through the conventional method.

Nanoscale NAND SONOS memory devices including a Seperated double-gate FinFET structure

  • Kim, Hyun-Joo;Kim, Kyeong-Rok;Kwack, Kae-Dal
    • Journal of Applied Reliability
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    • v.10 no.1
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    • pp.65-71
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    • 2010
  • NAND-type SONOS with a separated double-gate FinFET structure (SDF-Fin SONOS) flash memory devices are proposed to reduce the unit cell size of the memory device and increase the memory density in comparison with conventional non volatile memory devices. The proposed memory device consists of a pair of control gates separated along the direction of the Fin width. There are two unique alternative technologies in this study. One is a channel doping method and the other is an oxide thickness variation method, which are used to operate the SDF-Fin SONOS memory device as two-bit. The fabrication processes and the device characteristics are simulated by using technology comuter-adided(TCAD). The simulation results indicate that the charge trap probability depends on the different channel doping concentration and the tunneling oxide thickness. The proposed SDG-Fin SONOS memory devices hold promise for potential application.

Deuterium Ion Implantation for The Suppression of Defect Generation in Gate Oxide of MOSFET (MOSFET 게이트 산화막내 결함 생성 억제를 위한 효과적인 중수소 이온 주입)

  • Lee, Jae-Sung;Do, Seung-Woo;Lee, Yong-Hyun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.7
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    • pp.23-31
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    • 2008
  • Experiment results are presented for gate oxide degradation under the constant voltage stress conditions using MOSFETs with 3-nm-thick gate oxides that are treated by deuterium gas. Two kinds of methods, annealing and implantation, are suggested for the effective deuterium incorporation. Annealing process was rather difficult to control the concentration of deuterium. Because the excess deuterium in gate oxide could be a precursor for the wear-out of gate oxide film, we found annealing process did not show improved characteristics in device reliability, compared to conventional process. However, deuterium implantation at the back-end process was effective method for the deuterated gate oxide. Device parameter variations as well as the gate leakage current depend on the deuterium concentration and are improved by low-energy deuterium implantation, compared to those of conventional process. Especially, we found that PMOSFET experienced the high voltage stress shows a giant isotope effect. This is likely because the reaction between "hot" hole and deuterium is involved in the generation of oxide trap.

Study on electrical characteristics of metal-insulator-metal diodes (금속-절연체-금속다이오드의 전기적 특성에 관한 연구)

  • 장재명;백수현;민남기
    • 전기의세계
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    • v.31 no.3
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    • pp.218-225
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    • 1982
  • Metal-Oxide-Metal thin film diodes have been fabricated on the glass substrates by conventional vacuum evaporation method, and the electrical properties, primarily current-voltage characteristics of diodes, have been discussed in the light of various conduction theories presented so far. The experimental results were ploted in the different figures according to the assumed theory, and the characteristic coefficients peculior to these theories were estimated from the function dependence of current (I) upon voltage (V), temperature (T) and oxide film thickness (d).

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Preparation and Pharmacokinetic evaluation of Captopril Matrix Tablets with Polyethylene Oxide (폴리에틸렌옥시드를 이용한 캅토프릴 매트릭스 정제의 제조 및 약물동력학적 평가)

  • Jiang, Ge;Baek, Myoung-Ki;Jee, Ung-Kil
    • Journal of Pharmaceutical Investigation
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    • v.29 no.1
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    • pp.7-12
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    • 1999
  • The captopril matrix tablets composed of polyethylene oxide(PEO) was prepared and administered to beagle dogs. Captopril matrix tablets were prepared using direct compressed method and wet granulation compressed method with various ratios of drug to PEO. The diffusion rate of captopril matrix tablets followed on the Higuchi's diffusion model. With increasing hardness of captopril matrix tablets, release rate was decreased. Each formulation was evaluated by the area under the curve (AUC) and time course of plasma captopril concentration after oral administration to beagle dogs. The $AUC_{0-12}$ were $9.126\;{\mu}g\;h/ml$ and $6.417\;{\mu}g\;h/ml$ for the matrix tablets and conventional tablets, respectively. Therefore, the bioavailability of captopril matrix tablets was greater than that of commercial product. It is suggested that captopril matrix tablets using PEO is a useful sustained release formulation.

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The Influence of CuO on Bonding Behaviors of Low-Firing-Substrate and Cu Conductor (저온소성 기판과 Cu와의 동시소성에 미치는 CuO의 첨가효과)

  • 박정현;이상진
    • Journal of the Korean Ceramic Society
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    • v.31 no.4
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    • pp.381-388
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    • 1994
  • A new process which co-fires the low-firing-substrate and copper conductor was studied to achieve good bond strength and low sheet resistance of conductor. Cupric oxide is used as the precursor of conductive material in the new method and the firing atmosphere of the new process is changed sequently in air H2N2. The addition of cupric oxide and variations of firing atmosphere permited complete binder-burnout in comparison with the conventional method and contributed to the improvement of resistance and bonding behaviors. The potimum conditions of this experiment to obtain the satisfactory resistance and bond strength are as follows (binder-burnout temperature in air; 55$0^{\circ}C$, reducing temperature in H2; 40$0^{\circ}C$ for 30 min, ratio of copper and cupric oxide; 60:40~30:70 wt%). The bonding mechanism between the substrate and metal was explained by metal diffusion layer in the interface and the bond strength mainly depended on the stress caused by the difference of shrinkage and thermal expansion coefficient between the substrate and metal.

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Structural and Electrical Features of Solution-Processed Li-doped ZnO Thin Film Transistor Post-Treated by Ambient Conditions

  • Kang, Tae-Sung;Koo, Jay-Hyun;Kim, Tae-Yoon;Hong, Jin-Pyo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.242-242
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    • 2012
  • Transparent oxide semiconductors are increasingly becoming one of good candidates for high efficient channel materials of thin film transistors (TFTs) in large-area display industries. Compare to the conventional hydrogenated amorphous silicon channel layers, solution processed ZnO-TFTs can be simply fabricated at low temperature by just using a spin coating method without vacuum deposition, thus providing low manufacturing cost. Furthermore, solution based oxide TFT exhibits excellent transparency and enables to apply flexible devices. For this reason, this process has been attracting much attention as one fabrication method for oxide channel layer in thin-film transistors (TFTs). But, poor electrical characteristic of these solution based oxide materials still remains one of issuable problems due to oxygen vacancy formed by breaking weak chemical bonds during fabrication. These electrical properties are expected due to the generation of a large number of conducting carriers, resulting in huge electron scattering effect. Therefore, we study a novel technique to effectively improve the electron mobility by applying environmental annealing treatments with various gases to the solution based Li-doped ZnO TFTs. This technique was systematically designed to vary a different lithium ratio in order to confirm the electrical tendency of Li-doped ZnO TFTs. The observations of Scanning Electron Microscopy, Atomic Force Microscopy, and X-ray Photoelectron Spectroscopy were performed to investigate structural properties and elemental composition of our samples. In addition, I-V characteristics were carried out by using Keithley 4,200-Semiconductor Characterization System (4,200-SCS) with 4-probe system.

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Effects of Pre-synthesized $BaTiO_3$ Addition on the Microstructure and Dielectric/ Piezoelectric Properties of $(Bi_{0.5}Na_{0.5})_{0.94}Ba_{0.06}TiO_3$ Piezoelectric Ceramics

  • Khansur, Neamul Hayet;Yoon, Man-Soon;Kweon, Soon-Yong;Lee, Young-Geun;Ur, Soon-Chul
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.189-189
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    • 2008
  • Due to the environmental issue vast research is going on to replace the widely used lead contented piezoelectric materials. Bismuth sodium titanate (abbreviated as BNT) based bismuth sodium titanate-barium titanate (abbreviated as BNBT) ceramic was prepared by using modified method rather than conventional mixed oxide method. This modification was made to improve the properties of BNT based ceramic. In this procedure $BaTiO_3$ (abbreviated as BT) was prepared using conventional mixed oxide method. Analytical grade raw materials of $BaCO_3$ and $TiO_2$ were weighted and ball milled using ethanol medium. The mixed slurry was dried and sieved under 80 mesh. Then the powder was calcined at $1100^{\circ}C$ for 2 hours. This calcined BT powder was used in the preparation of BNBT. Stoichiometric amount of $Bi_2O_3$, $Na_2CO_3$, $TiO_2$ and BT were weighted and mixed by using ball mill. The used calcination temperature was $850^{\circ}C$ for 2 hours. Calcined powder was taken for another milling step. BNBT disks were pressed to 15 mm of diameter and then cold isostatical press (CIP) was used. Pressed samples were sintered at $1150^{\circ}C$ for 2 hours. The SEM microstructure analysis revealed that the grain shape of the sintered ceramic was polyhedral and grain boundary was well matched where as the sample prepared by conventional method showed irregular arrangement and grain boundary not well matched. And sintered density was better (5.78 g/cc) for the modified method. It was strongly observed that the properties of BNBT ceramic near MPB composition was found to be improved by the modified method compare to the conventional mixed oxide method. The piezoelectric constant dB of 177.33 pC/N, electromechanical coupling factor $k_p$ of 33.4%, dielectric constant $K_{33}^T$ of 688.237 and mechanical quality factor $Q_m$ of 109.37 was found.

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Effect of Pyrochlore Phase on Electric Properties for PNN-PT-PZ Piezoelectric Ceramics (PNN-PT-PZ계 압전세라믹스의 전기적 특성에 미치는 Pyrochlore 상의 영향)

  • 이기태;남효덕
    • Journal of the Korean Ceramic Society
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    • v.31 no.9
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    • pp.1030-1036
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    • 1994
  • The ceramics in the system 0.5[Pb(Ni1/3Nb2/3)O3]-0.5[0.65PbTiO3-0.35PbZrO3] were prepared by conventional solid state reaction method, double calcined method (columbite precursor method) and flux method using NaCl-KCl. Amount of pyrochlore phase for the calcined powders, sintering charateristrics, dielectric and piezoelectric properties were then investigated. Sintering temperature was 1000~120$0^{\circ}C$ and in case of flux method, the amount of flux to oxide was 1 : 1 mole ratio. The dielectric and piezoelectric properties of ceramics prepared by double calcined method and flux method were found to be better than those by conventional method. It was also possible to lower sintering temperature and reduce the amount of pyrochlore phase either by double calcined method or flux method. But with increasing sintering temperature, the difference in characteristrics due to diffrent fabrication method gradually.

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