• Title/Summary/Keyword: control reconfiguration

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Development of Reconfigurable Tactical Operation Display Framework by Battery and Battalion (포대/대대 별 재구성 가능한 전술작전화면 프레임워크 개발)

  • Lee, Sangtae;Lee, Seungyoung;Wi, SoungHyouk;Cho, Kyutae
    • Journal of KIISE
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    • v.44 no.5
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    • pp.476-485
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    • 2017
  • The tactical operation centers of future anti-aircraft missile systems provide the environment for the research on future air threats, tactical information, integrated battlefield environment creation and management, engagement control and command and control algorithms. To develop the key functional elements of integrated battlefield situation creation and processing and tactical operation automation processing operations, battery/battalion tactical operation control and reconfiguration design software are required. Therefore, the algorithm software of each function and the tactical operation display software and link software for interworking between equipment were developed as reconfigurable through a data-centric design. In this paper, a tactical operation display framework that can be reconfigured on the operation display of the tactical operations according to the battery/battalion is introduced. This tactical operation display framework was used to develop a common data model design for the reconfigurable structure of multi-role tactical operations with battery / battalion and mission views, and a display configuration tool that provides a tactical operation display framework for view development was also developed using the MVC pattern. If the tactical operation display framework is used, it will be possible to reuse the view design through the common base structure, and a view that can be reconfigured easily and quickly will also be developed.

A Conceptual Study of the underdevelopment of the British Multinational Corporations, 1870-1914: from the perspective of the network theory (1870-1914년 영국의 초국적 기업 발전을 저해한 요인 분석: 연결망(네트워크) 이론의 개념적 적용)

  • Yang, Oh Suk;Kang, Won Taek
    • Journal of International Area Studies (JIAS)
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    • v.14 no.1
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    • pp.129-153
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    • 2010
  • The guiding research question of this paper is to discover 'why the UK could not develop a general structure in which transnational corporations were born during the end of the 19th ~ beginning of the 20th century like other countries'. In response to this question, although acknowledging its imperfections, the author would like to explore the causality in the context of 'Social Construction' which is reflected in the attributes of British society. As such, researchers are strongly recommended to take into account the actors' interests and the increased value effect of events which is driven by control power. This paper concludes that: firstly, not only was contempt for industrial capitalism prevalent in British society, the British government was unable to recognize the necessity of promoting policies for the development of transnational corporation. In addition, the increase in the clout of commercial-financial capitalists in the city of London along with the expansion of gentlemanly elites interfered with the transnationality of British companies. Secondly, the foundation of the political and economic structures in the UK experienced continuity and challenge simultaneously. Since the 1850's, the British social structure has been progressively characterized by the strengthening power of the commercial-financial elites in London, which resulted not in the transnationality of manufacturing but that of financial services. Finally, the configuration of the social network driven by the British elites consists of the actors' interests and control power in association with severance and connection. Unlike the complementarity of interests, in the initial stage, intended connection based on voluntary motivation between gentries and commercial-financial elites occurred in terms of control power. However, ultimately, the holding of power was transferred to the commercial-financial elites excluding the industrial capitalists and resulted in the reconfiguration of the social network.

The Effect of Physics Instruction Using Infographics Based on Visual Thinking in High School (고등학교에서 시각적 사고에 기반한 인포그래픽 활용 물리 수업의 효과)

  • Noh, Sang Mi;Son, Jeongwoo
    • Journal of The Korean Association For Science Education
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    • v.35 no.3
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    • pp.477-485
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    • 2015
  • In this study, we tried to find the effects of carrying out infographics instruction based on visual thinking with the infographics materials presented in physics textbooks targeting specialized vocational high school students. Thus, 60 students were divided into the experimental group and the control group, the experimental group had 25 classes composed of 'infographics concept formation, infographics understanding activity, and infographics configuration activity', on the other hand, the control group were instructed by lecture-type class. The results of this study are as follows: First, features of the infographics created by the students include changes in types of presentation from 'simple arrangement' to 'simple reconfiguration' and from 'illustration' to 'comparative analysis', which were made by the visual thinking of the students activated in accordance with the increase of their configuration times. Second, instruction by using infographics, visual thinking significantly improved in the level of understanding, visibility, usability, and communicability. Third, after instruction using infographics, the mean score of the experimental group's achievement significantly improved. Fourth, there was a significant improvement in the area of 'normality of scientist, attitude on scientific inquiry, and scientific attitude' in the test of attitudes toward science. From the analysis results, we could conclude that instruction using infographics enhance students' understanding of scientific concepts and communication capability by improving visual thinking abilities, which have a positive impact on academic achievement and attitudes toward science.

A Study on Shape Optimization of Distributed Actuators using Time Domain Finite Element Method (시간유한요소법을 이용한 분포형 구동기의 형상최적화에 관한 연구)

  • Suk, Jin-Young;Kim, You-Dan
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.33 no.9
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    • pp.56-65
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    • 2005
  • A dynamic analysis method that freezes a time domain by discretization and solves the spatial propagation equation has a unique feature that provides a degree of freedom on spatial domain compared with the space discretization or space-time discretization finite element method. Using this feature, the time finite element analysis can be effectively applied to optimize the spatial characteristics of distributed type actuators. In this research, the time domain finite element method was used to discretize the model. A state variable vector was used in the discretization to include arbitrary initial conditions. A performance index was proposed on spatial domain to consider both potential and vibrational energy, so that the resulting shape of the distributed actuator was optimized for dynamic control of the structure. It is assumed that the structure satisfies the final rest condition using the realizable control scheme although the initial disturbance can affect the system response. Both equations on states and costates were derived based on the selected performance index and structural model. Ricatti matrix differential equations on state and costate variables were derived by the reconfiguration of the sub-matrices and application of time/space boundary conditions, and finally optimal actuator distribution was obtained. Numerical simulation results validated the proposed actuator shape optimization scheme.

A Study on Survivability of Node using Response Mechanism in Active Network Environment (액티브 네트워크 환경에서 대응 메커니즘을 이용한 노드 생존성에 관한 연구)

  • Yang, Jin-Seok;Lee, Ho-Jae;Chang, Beom-Hwan;Kim, Hyoun-Ku;Han, Young-Ju;Chung, Tai-Myoung
    • The KIPS Transactions:PartC
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    • v.10C no.6
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    • pp.799-808
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    • 2003
  • Existing security solutions such as Firewell and IDS (Intrusion Detection System) have a trouble in getting accurate detection rate about new attack and can not block interior attack. That is, existing securuty solutions have various shortcomings. Shortcomings of these security solutions can be supplemented with mechanism which guarantees an availability of systems. The mechanism which guarantees the survivability of node is various, we approachintrusion telerance using real time response mechanism. The monitoring code monitors related resources of system for survivability of vulnerable systm continuously. When realted resources exceed threshold, monitoring and response code is deployed to run. These mechanism guarantees the availability of system. We propose control mathod about resource monitoring. The monitoring code operates with this method. The response code may be resident in active node for availability or execute a job when a request is occurred. We suggest the node survivability mechanism that integrates the intrusion tolerance mechanism that complements the problems of existing security solutions. The mechanism takes asvantage of the automated service distribution supported by Active Network infrastructure instead of passive solutions. The mechanism takes advantage of the automated service distribution supported by Active Network infrastructure instead of passive system reconfiguration and patch.

Hardware Approach to Fuzzy Inference―ASIC and RISC―

  • Watanabe, Hiroyuki
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 1993.06a
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    • pp.975-976
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    • 1993
  • This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}

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