• Journal of KIISE:Computing Practices and Letters
• /
• v.15 no.1
• /
• pp.62-66
• /
• 2009

Recently developed compilers perform some optimizations in order to speed up the execution time of source program. These optimizations require the transformation of the sequence of program statements. This transformation does not give any problems in a single-threaded program. However, the transformation gives some significant errors in a multi-threaded program. State-of-the-art model checkers such as Java-Pathfinder do not consider the transformation resulted in the optimization step in a compiler since they just consider a single memory model. In this paper, we describe a new technique which is based on SMT solver. The Java Memory Model Simulator based on SMT Solver can compute all possible output of given multi-thread program within one second which, in contrast, Traditional Java Memory Model Simulator takes one minute.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.37 no.2
• /
• pp.78-84
• /
• 2000

The Viterbi decoders can be classified into serial Viterbi decoders and parallel Viterbi decoders. Parallel Viterbi decoders can handle higher data rates than serial Viterbl decoders. This paper designs and implements a fully parallel Viterbi decoder for high speed multimedia communications. For high speed operations, the ACS (Add-Compare-Select) module consisting of 64 PEs (Processing Elements) can compute one stage in a clock. In addition, the systolic away structure with 32 pipeline stages is developed for the TB (traceback) module. The implemented Viterbi decoder can support code rates 1/2, 2/3, 3/4, 5/6 and 7/8 using punctured codes. We have developed Verilog HDL models and performed logic synthesis. The 0.6 ${\mu}{\textrm}{m}$ SAMSUNG KG75000 SOG cell library has been used. The implemented Viterbi decoder has about 100,400 gates, and is running at 70 MHz in the worst case simulation.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2000.05a
• /
• pp.442-446
• /
• 2000

The metal-oxide-semiconductor field-effect transistor(MOSFET) has undergone many changes in the last decade in response to the constant demand for increased speed, decreased power, and increased parking density. Therefore, it was interested in scaling theory, and full-band Monte Carlo device simulator has been used to study the effects of device scaling on hot carriers in different MOSFET structures. MOSFET structures investigated in this study include a conventional MOSFET with a single source/drain, implant a lightly-doped drain(LDD) MOSFET, and a MOSFET built on an epitaxial layer(EPI) of a heavily-doped ground plane, and those are analyzed using TCAD(Technology Computer Aided Design) for scaling and simulation. The scaling has used a constant-voltage scaling method, and we have presented MOSFET´s characteristics such as I-V characteristic, impact ionization, electric field and recognized usefulness of TCAD, providing a physical basis for understanding how they relate to scaling.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.21 no.1
• /
• pp.137-143
• /
• 2017

X-ray image is a widely used to medical examination, airport security and cargo inspection. However, X-ray images contain many visual noise, which interrupt image analysis. Consequently, it is primary importance to reduce noises of X-ray image. In this paper, we present a improved denoise technique for x-ray image using pixel value and range weights. First, we denoise a x-ray image using bilateral filter. Next, we detect a edge region of the original x-ray image. If a denoised pixel belongs to the edge region, we calculate weighting values of original x-ray image and denoised x-ray image in $3{\times}3$ neighboring pixels and compute the cost value to determine the boundary pixel value. Finally, the pixel value having minimum cost is determined as the pixel value of the denoised x-ray image. Simulation results show that the proposed algorithm achieves good performance in terns of PSNR comparison and subjective visual quality.

• Journal of Institute of Control, Robotics and Systems
• /
• v.21 no.9
• /
• pp.898-902
• /
• 2015

Alternative radio-navigation technologies aim at providing continuous navigation solution even if one cannot use GNSS (Global Navigation Satellite System). In shadowing region such as indoor environment, GNSS signal is no longer available and the alternative navigation system should be used together with GNSS to provide seamless positioning. For soldiers in battlefield where GNSS signal is jammed or in street battle, the alternative navigation system should work without positioning infrastructure. Moreover, the radio-navigation system should have scalability as well as high accuracy performance. This paper presents a TWR (Two-Way-Ranging)-based cooperative positioning system (CPS) that does not require location infrastructure. It is assumed that some members of CPS can obtain GNSS-based position and they are called mobile anchors. Other members unable to receive GNSS signal compute their position using TWR measurements with mobile anchors and neighboring members. Error propagation in CPS is analytically studied in this paper. Error budget for TWR measurements is modeled first. Next, location error propagation in CPS is derived in terms of range errors. To represent the location error propagation in the CPS, Location Error Propagation Indicator (LEPI) is proposed in this paper. Simulation results show that location error of tags in CPS is mainly influenced by the number of hops from anchors to the tag to be positioned as well as the network geometry of CPS.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.7 no.1
• /
• pp.83-91
• /
• 1996

The SPICE circuit analysis program has a limited math capability and, in general, cannot be used for RF and microwave simulation because a complex arithmetic is required to compute S-parameters from node voltages. This paper presents two test bench models that can be used to obtain node voltages proportional to incident, reflected, and transmitted signals. From SPICE computed node voltages, S-parameters are computed using the math capability of the PSPICE post processor, PROBE, as an example for a low-pass filter consisting of transmission line sections. The results of this example are compared with another high frequency circuit analysis program, TOUCHSTONE. The difference between the results of these two programs in magnitude was less than 0.003 and in phase was a few tenths of a degree. By using these test benchs to simulate a filter, RF and microwave analysis can be made with the SPICE, which can be a cost-effective and readily available computational tool for educators and practicing engineers.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.44 no.4 s.316
• /
• pp.117-122
• /
• 2007

For multiple antenna systems, we consider the hybrid iterative detection of the maximum a posteriori probability(MAP) detection and the linear detection such as the minimum-mean-square-error(MMSE) filtering with soft cancelation. We devise methods to obtain both the lower complexity of the linear detection and the superior performance of the MAP detection. Using the a prior probability of the coded bit which is extrinsic of the outer decoder, we compute the threshold of grouping and determine the detection scheme symbol by symbol. Through the simulation results, it is shown that the proposed receiver obtains the superior performance to the MMSE detector and the lower complexity than the MAP detector.

• The Korean Journal of Applied Statistics
• /
• v.32 no.5
• /
• pp.763-782
• /
• 2019

This paper proposes a probabilistic document ranking model incorporating term dependencies. Document ranking is a fundamental information retrieval task. The task is to sort documents in a collection according to the relevance to the user query (Qin et al., Information Retrieval Journal, 13, 346-374, 2010). A probabilistic model is a model for computing the conditional probability of the relevance of each document given query. Most of the widely used models assume the term independence because it is challenging to compute the joint probabilities of multiple terms. Words in natural language texts are obviously highly correlated. In this paper, we assume a multinomial distribution model to calculate the relevance probability of a document by considering the dependency structure of words, and propose an information retrieval model to rank a document by estimating the probability with the maximum entropy method. The results of the ranking simulation experiment in various multinomial situations show better retrieval results than a model that assumes the independence of words. The results of document ranking experiments using real-world datasets LETOR OHSUMED also show better retrieval results.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.38 no.4
• /
• pp.381-391
• /
• 2001

This paper presents an efficient approach to build an image mosaics from image sequences. Unlike general panoramic stitching methods, which usually require some geometrical feature points or solve the iterative nonlinear equations, our algorithm can directly recover the 8-parameter planar perspective transforms. We use four quasi-feature points in order to compute the projective transform between two images. This feature is based on the graylevel distribution and defined in the overlap area between two images. Therefore the proposed algorithm can reduce the total amount of the computation. We also present an algorithm lot efficiently matching the correspondence of the extracted feature. The proposed algorithm is applied to various images to estimate its performance and. the simulation results present that our algorithm can find the correct correspondence and build an image mosaics.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.13 no.2
• /
• pp.333-340
• /
• 2018

This paper introduces a BCH code decoder using parallel CRC(: Cyclic Redundancy Check) generation. Using a conventional parallel syndrome generator with a LFSR(: Linear Feedback Shift Register), it takes up a lot of space for a short code. The proposed decoder uses the parallel CRC method that is widely used to compute the checksum. This scheme optimizes the a syndrome generator in the decoder by eliminating redundant xor operation compared with the parallel LFSR and thus minimizes chip area and propagation delay. In simulation results, the proposed decoder has accomplished propagation delay reduction of 2.01 ns as compared to the conventional scheme. The proposed decoder has been designed and synthesized in $0.35-{\mu}m$ CMOS process.