• 제목/요약/키워드: communication latency

검색결과 563건 처리시간 0.029초

Uplinks Analysis and Optimization of Hybrid Vehicular Networks

  • Li, Shikuan;Li, Zipeng;Ge, Xiaohu;Li, Yonghui
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제13권2호
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    • pp.473-493
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    • 2019
  • 5G vehicular communication is one of key enablers in next generation intelligent transportation system (ITS), that require ultra-reliable and low latency communication (URLLC). To meet this requirement, a new hybrid vehicular network structure which supports both centralized network structure and distributed structure is proposed in this paper. Based on the proposed network structure, a new vehicular network utility model considering the latency and reliability in vehicular networks is developed based on Euclidean norm theory. Building on the Pareto improvement theory in economics, a vehicular network uplink optimization algorithm is proposed to optimize the uplink utility of vehicles on the roads. Simulation results show that the proposed scheme can significantly improve the uplink vehicular network utility in vehicular networks to meet the URLLC requirements.

Agent with Low-latency Overcoming Technique for Distributed Cluster-based Machine Learning

  • Seo-Yeon, Gu;Seok-Jae, Moon;Byung-Joon, Park
    • International Journal of Internet, Broadcasting and Communication
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    • 제15권1호
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    • pp.157-163
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    • 2023
  • Recently, as businesses and data types become more complex and diverse, efficient data analysis using machine learning is required. However, since communication in the cloud environment is greatly affected by network latency, data analysis is not smooth if information delay occurs. In this paper, SPT (Safe Proper Time) was applied to the cluster-based machine learning data analysis agent proposed in previous studies to solve this delay problem. SPT is a method of remotely and directly accessing memory to a cluster that processes data between layers, effectively improving data transfer speed and ensuring timeliness and reliability of data transfer.

Design and Implementation of a Massively Parallel Multithreaded Architecture: DAVRID

  • Sangho Ha;Kim, Junghwan;Park, Eunha;Yoonhee Hah;Sangyong Han;Daejoon Hwang;Kim, Heunghwan;Seungho Cho
    • Journal of Electrical Engineering and information Science
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    • 제1권2호
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    • pp.15-26
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    • 1996
  • MPAs(Massively Parallel Architectures) should address two fundamental issues for scalability: synchronization and communication latency. Dataflow architecture faces problems of excessive synchronization overhead and inefficient execution of sequential programs while they offer the ability to exploit massive parallelism inherent in programs. In contrast, MPAs based on von Neumann computational model may suffer from inefficient synchronization mechanism and communication latency. DAVRID (DAtaflow/Von Neumann RISC hybrID) is a massively parallel multithreaded architecture which takes advantages of von Neumann and dataflow models. It has good single thread performance as well as tolerates synchronization and communication latency. In this paper, we describe the DAVRID architecture in detail and evaluate its performance through simulation runs over several benchmarks.

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전자파 적합성 평가를 위한 하이브리드 V2X 통신모듈 설계 (Design of Hybrid V2X Communication Module for Electromagnetic Confirmity Evaluation)

  • 최승규;이주원;김규현
    • 자동차안전학회지
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    • 제15권4호
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    • pp.65-70
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    • 2023
  • In the paper, we propose a design method and process of a hybrid V2X communication module that combines WAVE communication, LTE-V2X communication, and legacy LTE communication in evaluating vehicle V2X electromagnetic compatibility. C-ITS is suitable for safety service applications due to its low latency, and legacy LTE is suitable for applications such as traffic information and infotainment due to its high latency and high capacity. In order to evaluate the V2X communication system, the evaluation equipment must have communication performance of the same level or higher. The main design contents presented in this paper will be applied to the implementation of a hybrid V2X communication module for electromagnetic compatibility evaluation.

버스 프로토콜 호환 가능한 네트워크-온-칩에서의 분리된 주소/데이터 네트워크 설계 (Separated Address/Data Network Design for Bus Protocol compatible Network-on-Chip)

  • 정승아;이재훈;김상헌;이재성;한태희
    • 전자공학회논문지
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    • 제53권4호
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    • pp.68-75
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    • 2016
  • 다중 프로세서 시스템-온-칩(Multi-Processor SoC, MPSoC)에서의 코어 및 IP 개수 증가 추세에 따라 병렬처리와 확장성에 유리한 인터커넥션 구조인 네트워크-온-칩(Network-on-Chip, NoC)이 등장하였다. 하지만 기존 IP를 재활용하기 위해서는 버스 프로토콜과 호환가능한 NoC에서의 지연시간을 최적화하기 위한 연구가 필요하다. 본 논문에서는 버스 프로토콜 호환 가능한 NoC 설계 시, 버스 프로토콜에서 특성이 다른 다수의 트랜잭션 단계에서 유발되는 홉 수와 경로 충돌의 대립관계로 인해 지연시간이 증가하는 문제를 주소 및 데이터 네트워크로 분리 설계함으로써 해결하였다. 모의실험으로 벤치마크 어플리케이션과 무작위 생성한 어플리케이션에서의 실험 결과를 통해 Mesh구조와 TopGen의 비정형 토폴로지와 비교했을 때, 평균 지연시간은 19.46% 및 실행시간은 10.55% 감소하였다.

Grant-Aware Scheduling Algorithm for VOQ-Based Input-Buffered Packet Switches

  • Han, Kyeong-Eun;Song, Jongtae;Kim, Dae-Ub;Youn, JiWook;Park, Chansung;Kim, Kwangjoon
    • ETRI Journal
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    • 제40권3호
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    • pp.337-346
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    • 2018
  • In this paper, we propose a grant-aware (GA) scheduling algorithm that can provide higher throughput and lower latency than a conventional dual round-robin matching (DRRM) method. In our proposed GA algorithm, when an output receives requests from different inputs, the output not only sends a grant to the selected input, but also sends a grant indicator to all the other inputs to share the grant information. This allows the inputs to skip the granted outputs in their input arbiters in the next iteration. Simulation results using OPNET show that the proposed algorithm provides a maximum 3% higher throughput with approximately 31% less queuing delay than DRRM.

하이브리드 광학 네트워크-온-칩에서 지연 시간 최적화를 위한 매핑 알고리즘 (A Latency Optimization Mapping Algorithm for Hybrid Optical Network-on-Chip)

  • 이재훈;이창림;한태희
    • 전자공학회논문지
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    • 제50권7호
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    • pp.131-139
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    • 2013
  • 기존 전기적 상호 연결을 사용한 네트워크-온-칩(Network-on-Chip, NoC)의 전력 및 성능 한계를 보완하고자 광학적 상호연결을 이용하는 하이브리드 광학 네트워크-온-칩(HONoC)이 등장하였다. 하지만 HONoC에서는 광학적 소자 특성으로 인해 서킷 스위칭을 사용함으로써 경로 충돌이 빈번하게 발생하며 이로 인해 지연 시간 불균형의 문제가 심화되어 전체적인 시스템 성능에 악영향을 미치게 된다. 본 논문에서는 경로 충돌을 최소화 시켜 지연 시간을 최적화 할 수 있는 새로운 태스크 매핑 알고리즘을 제안하였다. HONoC 환경에서 태스크를 각 Processing Element (PE)에 할당하고 경로 충돌을 최소화하며, 부득이한 경로 충돌의 경우 워스트 케이스 (worst case) 지연 시간을 최소화 할 수 있도록 하였다. 모의실험 결과를 통해 무작위 매핑 방식, 대역폭 제한 매핑 방식과 비교하여, 제안된 알고리즘이 $4{\times}4$ 메시 토폴로지에서는 평균 43%, $8{\times}8$ 메시 토폴로지에서는 평균 61%의 지연 시간 단축 효과가 있음을 확인할 수 있었다.

플랜트 시설에서 지연시간 감소를 위한 동적 듀티사이클 조절 기법 (A Dynamic Duty Cycle Adjustment Mechanism for Reduced Latency in Industrial Plants)

  • 정진만;윤지섭;윤영선;소선섭;은성배
    • 한국인터넷방송통신학회논문지
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    • 제16권1호
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    • pp.193-198
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    • 2016
  • 안전한 플랜트 설비의 상태 감시 및 장애 진단을 위해 무선 센서를 이용한 플랜트 설비용 모니터링 시스템이 연구되고 있다. 플랜트 설비에서는 저전력 뿐만 아니라 안전사고와 직결된 긴급 상황시 실시간성도 고려해야 한다. 본 논문에서는 플랜트 시설에서 지연시간 감소를 위한 동적 듀티사이클 조절 기법을 제안한다. 제안된 동적 듀티사이클 조절 기법은 센싱된 데이터 값의 긴급한 정도에 따라 미리 정의된 위험 그룹으로 구분하여 적응적으로 듀티사이클 주기를 조절한다. 실시간성을 평가하기 위해 고정 듀티사이클 기법과 동적 듀티사이클의 예상 지연시간을 확률적으로 분석하였다. 비교 결과, 플랜트 시설과 같이 이상 징후 발생 시 에너지를 소모하더라도 실시간성을 제공해야 하는 상황에서 제안 동적 듀티사이클 기법이 더 효과적임을 확인하였다.

RTK Latency Estimation and Compensation Method for Vehicle Navigation System

  • Jang, Woo-Jin;Park, Chansik;Kim, Min;Lee, Seokwon;Cho, Min-Gyou
    • Journal of Positioning, Navigation, and Timing
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    • 제6권1호
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    • pp.17-26
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    • 2017
  • Latency occurs in RTK, where the measured position actually outputs past position when compared to the measured time. This latency has an adverse effect on the navigation accuracy. In the present study, a system that estimates the latency of RTK and compensates the position error induced by the latency was implemented. To estimate the latency, the speed obtained from an odometer and the speed calculated from the position change of RTK were used. The latency was estimated with a modified correlator where the speed from odometer is shifted by a sample until to find best fit with speed from RTK. To compensate the position error induced by the latency, the current position was calculated from the speed and heading of RTK. To evaluate the performance of the implemented method, the data obtained from an actual vehicle was applied to the implemented system. The results of the experiment showed that the latency could be estimated with an error of less than 12 ms. The minimum data acquisition time for the stable estimation of the latency was up to 55 seconds. In addition, when the position was compensated based on the estimated latency, the position error decreased by at least 53.6% compared with that before the compensation.

IEC 61850 통신에서의 전송 지연시간 개선을 위한 실시간 임베디드 시스템 개발 (Development of real-time embedded systems for reducing the transmission delay latency in IEC 61850 communication)

  • 조창두;강승화;강상희;남순열
    • 전기학회논문지
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    • 제61권11호
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    • pp.1590-1594
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    • 2012
  • Depend on delay latency rule for message transmission defined in IEC 61850 standard, the fastest message has to be transferred within 3us. This paper suggests how to structure the real time message transmit test environment of IEC 61850 and develope how to securing IEC 61850 communication performance based on IEC 61850 by measuring delay latency of message transfer on embeded linux system.