• 전기의세계
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• 제26권6호
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• pp.41-47
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• 1977

The paper deals with the fundamental specification for the physical implementation of interface circuit, which will play an important role in information and signal trammission between computer and controlled system, and also we have proved that the digital contoller will be able to improve the data handling of interface circuit.

• 한국소음진동공학회논문집
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• 제14권6호
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• pp.455-462
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• 2004

This paper is concerned with the implementation of the active vibration suppression controller using analog circuit and microprocessor. The target active vibration controller is the positive position feedback(PPF) controller since it provides a simple algorithm suitable for both analog circuit and digital controllers. In this study, the analog PPF controller is realized using an operational amplifier and the digital PPF controller is realized using a low-cost micro-controller. The circuit diagrams are explained in detail. We then discuss the advantages and disadvantages of both methods from the view of practical implementation. Experimental results show that both implementation methods can be effectively used for the active vibration control but need to be chosen based on the mission objective.

• 디지털산업정보학회논문지
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• 제8권1호
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• pp.41-46
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• 2012

In this paper, An efficient circuit design algorithm considering constraint is proposed. The proposed algorithm sets up in time constraint and area constraint, power consumption constraint for a circuit implementation. First, scheduling process for time constraint. Select the FU(Function Unit) which is satisfied with time constraint among the high level synthesis results. Analyze area and power consumption of selected FUs. Constraint set for area and power constraint. Device selection to see to setting condition. Optimization circuit implementation in selected device. The proposed algorithm compared with [7] and [8] algorithm. Therefore the proposed algorithm is proved an efficient algorithm for optimization circuit implementation.

• 전자공학회논문지B
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• 제29B권10호
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• pp.10-18
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• 1992

This paper considers and implementation of the memory system which provides simultaneous access to pq image points of block(p$\times$q), horizontal vector(1$\times$pq)and/vertical vector(pq$\times$1) in 2-dimension image array, where p and q are design parameters. This memory system consists of an address calculation circuit, address routing circuit, data routing circuit, module selection circuit and m memory modules where m>qp. The address calculation circuit computes pq addresses in parallel by using the difference of addresses among image points. Extra module assignment circuit is not used by improving module selection circuit with routhing circuit. By using Verilog-XL logic simulator, we verify the correctness of the memory system and estimate the performance. The implemented system provides simultaneous access to 16 image points and is 6 times faster than conventional memory system.

• 실천공학교육논문지
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• 제8권2호
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• pp.95-101
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• 2016

본 논문에서는 디지털 논리회로의 동작 원리에 대한 이해를 돕기 위해, 스위치 기반 LED (Light Emitting Diode) Art 논리 회로 구현 방법을 소개한다. 브레드 보드를 이용한 디지털 논리회로 실습은 국내 교육과정의 고등학교 및 대학교 수준의 해당 학과에서 필수 교육과정으로 지정하고 있다. 하지만 실제 실습에는 기초적인 구현 예제가 부족하고, 이에 따른 결과로 복잡한 디지털 논리회로 예제를 통한 학습으로 디지털 논리회로의 기초 동작 원리에 대한 이해를 방해하는 문제점을 갖고 있다. 따라서, 스위치를 이용한 기초적인 실습예제이며, 다수의 출력 장치 신호들을 동시에 제어하는 논리회로의 필요성을 이해할 수 있는 LED Art 회로 구현 방법을 제안하고 시험하였다.

• 한국전자통신학회논문지
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• 제5권2호
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• pp.158-163
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• 2010

본 연구에서는 Chua 회로의 선형 요소인 R, L C 성분의 요소 중에서 포화 특성을 가지고 있어 상용화된 제품으로는 제작 구현이 어려운 L 성분을 C 성분으로 대체하는 간략화한 Chua's 회로를 실제 하드웨어를 이용하여 제작하고 그 결과로 얻은 생성된 카오스 어트랙터를 기존의 Chua's 회로와 비교하였다.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2000년도 추계학술대회 논문집
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• pp.602-609
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• 2000

This study is concerned with analysis and reliability evaluation of LV circuit in Cab Cubicle system which controls train to keep safety in High Speed Train. LV circuit is operated with diagnosis system as safety system. In this paper, we suggest a design and an implementation method to analyze LV circuit or trace fault area in LV circuit. This simulator uses 28 package modules and examines input and output by equations. So, user can trace where is fault area. The implemented system can be expected to be useful for long term test and evaluation of circuit in high speed train systems. We expect reduction to diagnosis area or repair time by this simulator.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 1999년도 추계종합학술대회
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• pp.278-281
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• 1999

본 논문에서는 많은 함수를 용이하게 해석하고 테스트할 수 있는 결정도(Decision diagram)에 의한 다치순차논리회로(Multiple valued squential circuit)를 구현하였다 우선, 다치순차 회로의 기억소사는 D F/F를 이용하였으며 전류모드에 의한 결정도 순차 논리 회로를 구현한다 이 회로의 동자특성은 PSPICE 시뮬레이션을 통하여 확인하였다. 본 논문에서 제시한 전류모드 CMOS의 결정도 다치순차회로는 회선 경로 선택의 규칙성, 간단성, 여러함수를 쉽게 해석하고 테스트 할 수 있는 등등의 이점을 가지므로 VLSI화 실현에 적합할 것으로 생각된다.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2000년도 춘계학술대회 논문집
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• pp.188-194
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• 2000

This study is about fault detection and fault area detection of LV circuit in Cab Cubicle system which have control of train to keep safety in High Speed Train. LV circuit is operated with diagnosis system like safety system. In this paper, we suggest a design and an implementation method to detect fault or to detect fault area automatically about LV circuit. The implemented system is tested successfully after implementation of some function. We expect reduction to diagnosis area or repair time by fault area module

• 전력전자학회:학술대회논문집
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• 전력전자학회 2017년도 전력전자학술대회
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• pp.138-139
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• 2017

This paper describes the design and implementation of a trigger circuit which can be series connected with main pulse circuit for a xenon flash lamp driver. For generating high voltage, the trigger circuit is designed as an inductive energy storage pulsed power modulator with 2 state step-up circuit consisting of a boost converter and a flyback circuit. In order to guarantee pulse width, a resonant capacitor on the output side of the flyback circuit is designed. This capacitor limits the output voltage to protect the flyback switch. In addition, to protect another power supply of xenon flash lamp driver from trigger pulse, the high voltage transformer which can carry the full current of main pulse is designed. To verify the proposed design, the trigger circuit is developed with the specification of maximum 23 kV, 0.6 J/pulse output and tested with a xenon flash lamp driver consisting of a main pulse circuit and a simmer circuit.