• Title/Summary/Keyword: chip-in-substrate

Search Result 321, Processing Time 0.027 seconds

Fabrication of plastic CE (capillary electrophoresis) microchip by hot embossing process (핫 엠보싱 공정을 이용한 플라스틱 CE(capillary electrophoresis) 마이크로 칩의 제작)

  • Cha Nam-Goo;Park Chang-Hwa;Lim Hyun-Woo;Park Jin-Goo
    • Proceedings of the Korean Society of Precision Engineering Conference
    • /
    • 2005.06a
    • /
    • pp.1140-1144
    • /
    • 2005
  • A plastic-based CE (capillary electrophoresis) microchip was fabricated by hot embossing process. A Si mold was made by wet etching process and a PMMA wafer was cut off from 1mm thick PMMA sheet. A micro-channel structure on PMMA substrate was produced by hot embossing process using the Si mold and the PMMA wafer. A vacuum assisted thermal bonding procedure was employed to seal an imprinted PMMA wafer and a blank PMMA wafer. The results of microscopic cross sectional images showed dimensions of channels were well preserved during thermal bonding process. In our procedure, the deformation amount of bonding process was below 1%. The entire fabrication process may be very useful for plastic based microchip systems.

  • PDF

A 77 GHz mHEMT MMIC Chip Set for Automotive Radar Systems

  • Kang, Dong-Min;Hong, Ju-Yeon;Shim, Jae-Yeob;Lee, Jin-Hee;Yoon, Hyung-Sup;Lee, Kyung-Ho
    • ETRI Journal
    • /
    • v.27 no.2
    • /
    • pp.133-139
    • /
    • 2005
  • A monolithic microwave integrated circuit (MMIC) chip set consisting of a power amplifier, a driver amplifier, and a frequency doubler has been developed for automotive radar systems at 77 GHz. The chip set was fabricated using a 0.15 ${\mu}$ gate-length InGaAs/InAlAs/GaAs metamorphic high electron mobility transistor (mHEMT) process based on a 4-inch substrate. The power amplifier demonstrated a measured small signal gain of over 20 dB from 76 to 77 GHz with 15.5 dBm output power. The chip size is 2mm${\times}$ 2mm. The driver amplifier exhibited a gain of 23 dB over a 76 to 77 GHz band with an output power of 13 dBm. The chip size is 2.1mm${\times}$ 2mm. The frequency doubler achieved an output power of -6 dBm at 76.5 GHz with a conversion gain of -16 dB for an input power of 10 dBm and a 38.25 GHz input frequency. The chip size is 1.2mm ${\times}$ 1.2mm. This MMIC chip set is suitable for the 77 GHz automotive radar systems and related applications in a W-band.

  • PDF

Simple and Cost-Effective Method for Edge Bead Removal by Using a Taping Method

  • Park, Hyeoung Woo;Kim, H.J.;Roh, Ji Hyoung;Choi, Jong-Kyun;Cha, Kyoung-Rae
    • Journal of the Korean Physical Society
    • /
    • v.73 no.10
    • /
    • pp.1473-1478
    • /
    • 2018
  • In this study, we have developed a simple and cost-effective method to prevent edge bead formation by covering the edge of a chip-level substrate with heat-resistant tape during patterning using SU-8. Edge beads are a fundamental problem in photoresists and are particularly notable in high-viscosity fluids and thick coatings. Edge beads can give rise to an air gap between the substrate and the patterning mask during UV exposure, which results in non-uniform patterns. Furthermore, the sample may break since the edge bead is in contact with the mask. In particular, the SU-8 coating thickness of the chip-level substrates used in MEMS or BioMEMS may not be properly controlled because of the presence of edge beads. The proposed method to solve the edge bead problem can be easily and economically utilized without the need for a special device or chemicals. This method is simple and prevents edge bead formation on the sample substrate. Despite the small loss in the taping area, the uniformity of the SU-8 coating is improved from 50.9% to 5.6%.

Fabrication of Low Temperature Cofired Ceramic (LTCC) Chip Couplers for High Frequencies ; II. Effect of Sintering Process on Ag Diffusion (고주파용 저온 동시소성 세라믹(LTCC)칩 커플러 제조: II. Ag 이온 확산에 대한 소결공정의 영향)

  • 이선우;김경훈;심광보;구기덕
    • Journal of the Korean Ceramic Society
    • /
    • v.36 no.5
    • /
    • pp.490-496
    • /
    • 1999
  • The sintering behavior of LTCC (low temperature cofired ceramics) chip couplers was investigated in relation with Ag diffusion at the interface of glass ceramic substrate-Ag electrode. Sintering temperature was in the range of 825$^{\circ}C$-975$^{\circ}C$. The commercial green sheet and silver electrode were used. Below 875$^{\circ}C$ the diffusion of the Ag ion into the substrate and the penetration of glassy phases into the electrode occurred due to an increase of fluidity. Thus the lectrode line was severely deformed and damaged. At 975$^{\circ}C$ the transformation of crystalline phases into glassy phases and the melting of the Ag electrode resulted in the diffusion of the considerable amount of Ag ions.

  • PDF

Precise contact force control of a flip chip mounting head system

  • Shim, Jaehong;Cho, Youngim;Oh, Yeontaek
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 2002.10a
    • /
    • pp.109.1-109
    • /
    • 2002
  • This paper presents a macro/micro flip chip mounting head system for precise force control. In the proposed macro/ micro system, the macro actuator is conventional do servomotor with a ball screw mechanism and the micro actuator is a voice coil motor(VCM) that consists of four NdFeB magnets and a winded moving coil. For force control, a sensitive strain-gauge force sensor is mounted in the micro actuator. Through harmonic motion between macro and micro actuator, we would like to get precise contact force control when small sized flip chip is mounted on flexible substrate in high speed. In order to show the effectiveness of the proposed macro/micro flip chip mounting head system, we com...

  • PDF

Flexible and Embedded Packaging of Thinned Silicon Chip (초 박형 실리콘 칩을 이용한 유연 패키징 기술 및 집적 회로 삽입형 패키징 기술)

  • 이태희;신규호;김용준
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.11 no.1
    • /
    • pp.29-36
    • /
    • 2004
  • A flexible packaging scheme, which includes chip packaging, has been developed using a thinned silicon chip. Mechanical characteristics of thinned silicon chips are examined by bending tests and finite element analysis. Thinned silicon chips (t<30 $\mu\textrm{m}$) are fabricated by chemical etching process to avoid possible surface damages on them. And the chips are stacked directly on $Kapton^{Kapton}$film by thermal compressive bonding. The low height difference between the thinned silicon chip and $Kapton^{Kapton}$film allows electroplating for electrical interconnection method. Because the 'Chip' is embedded in the flexible substrate, higher packaging density and wearability can be achieved by maximized usable packaging area.

  • PDF

CSP + HDI : MCM!

  • Bauer, Charles-E.
    • Proceedings of the International Microelectronics And Packaging Society Conference
    • /
    • 2000.04a
    • /
    • pp.35-40
    • /
    • 2000
  • MCM technology languished troughout most of the 1990's due to high costs resulting from low yields and issues with known god die. During the last five years of the decade new developments in chip scale packages and high density, build up multi-layer printed wiring boards created new opportunities to design and produce ultra miniaturized modules using conventional surface mount manufacturing capabilities. Focus on the miniaturization of substrate based packages such as ball grid arrays (BGAs) resulted in chip scale packages (CSPs) offering many of the benefits of flip chip along with the handling, testing, manufacturing and reliability capabilities of packaged deviced. New developments in the PWB industry sought to reduce the size, weight, thickness and cost of high density interconnect (HDI) substrates. Shrinking geometries of vias and new constructions significantly increased the interconnect density available for MCM-L applications. This paper describes the most promising CSP and HDI technologies for portable products, high performance computing and dense multi-chip modules.

  • PDF

COG(chip on glass) 구조에서 유리를 투과하는 레이저 조사 방식에 의한 area array type 패키지의 마운팅 공정

  • 이종현;김원용;이용호;김영석
    • Proceedings of the International Microelectronics And Packaging Society Conference
    • /
    • 2001.07a
    • /
    • pp.119-126
    • /
    • 2001
  • Chip-on-glass(COG) mounting of area array electronic packages was attempted by heating the rear surface of a contact pad film deposited on a glass substrate. The pads consisted of an adhesion(i.e. Cr or Ti) and a top coating layer(i.e. Ni or Cu) was heated by an UV laser beam transmitted through the glass substrate. The laser energy absorbed on the pad raised the temperature of a solder ball which is in physical contact with the pad, forming a reflowed solder bump. The effects of the adhesion and top coating layer on the laser reflow soldering were studied by measuring temperature profile of the ball during the laser heating process. The results were discussed based on the measurement of reflectivity of the adhesion layer. In addition, the microstructures of solder bumps and their mechanical properties were examined.

  • PDF

A Simple Model Parameter Extraction Methodology for an On-Chip Spiral Inductor

  • Oh, Nam-Jin;Lee, Sang-Gug
    • ETRI Journal
    • /
    • v.28 no.1
    • /
    • pp.115-118
    • /
    • 2006
  • In this letter, a simple model parameter extraction methodology for an on-chip spiral inductor is proposed based on a wide-band inductor model that incorporates parallel inductance and resistance to model skin and proximity effects, and capacitance to model the decrease in series resistance above the frequency near the peak quality factor. The wide-band inductor model does not require any frequency dependent elements, and model parameters can be extracted directly from the measured data with some curve fitting. The validity of the proposed model and parameter extraction methodology are verified with various size inductors fabricated using $0.18\;{\mu}m$ CMOS technology.

  • PDF

A Study on the Improvement of Solder Joint Reliability for 153 FC-BGA (153 FC-BGA에서 솔더접합부의 신뢰성 향상에 관한 연구)

  • 장의구;김남훈;유정희;김경섭
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.9 no.3
    • /
    • pp.31-36
    • /
    • 2002
  • The 2nd level solder joint reliability of 153 FC-BGA for high-speed SRAM (Static Random Access Memory) with the large chip on laminate substrate comparing to PBGA(Plastic Ball Grid Array) was studied in this paper. This work has been done to understand an influence as the mounting with single side or double sides, structure of package, properties of underfill, properties and thickness of substrate and size of solder ball on the thermal cycling test. It was confirmed that thickness of BT(bismaleimide tiazine) substrate increased from 0.95 mm to 1.20 mm and solder joint fatigue life improved about 30% in the underfill with the low young's modulus. And resistance against the solder ball crack became twice with an increase of the solder ball size from 0.76 mm to 0.89 mm in solder joints.

  • PDF