• Transactions of the Korean Society of Mechanical Engineers A
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• v.32 no.4
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• pp.371-377
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• 2008

Our precedent study has reported glass-PDMS (polydimethylsiloxane) based biochip for the gene PCR (polymerase chain reaction). To prevent the contamination of bio sample, the once used biochip must not be used repeatedly. However, the fabrication cost of microheater and microsensor of the biochip was not cheap to use it as a disposable chip. This paper proposes new PCR-chip where the glass substrate integrated with the microheater and microsensor is detachable from the reaction chamber where the sample is injected. That makes it possible to reuse the glass substrate repeatedly. The performance of the proposed detachable PCR-chip was compared with that of the precedent monolithic PCR-chip. The results showed that the SRY (sex determining Y chromosome) gene PCR was successfully performed in the detachable chip compared with the monolithic chip. However, the more efforts to improve the efficiency of surface treatment of PDMS chip are needed to increase the possibility of applying the detachable chip to the detecting of male infertility.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.4
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• pp.155-161
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• 2018

A Si chip with the Cu/Au bumps of $100-{\mu}m$ diameter was flip-chip bonded using different anisotropic conductive adhesives (ACAs) onto the local stiffness-variant stretchable substrate consisting of polydimethylsiloxane (PDMS) and flexible printed circuit board (FPCB). The average contact resistances of the flip-chip joints processed with ACAs containing different conductive particles were evaluated and compared. The specimen, which was flip-chip bonded using the ACA with Au-coated polymer balls as conductive particles, exhibited a contact resistance of $43.2m{\Omega}$. The contact resistance of the Si chip, which was flip-chip processed with the ACA containing SnBi solder particles, was measured as $36.2m{\Omega}$, On the contrary, an electric open occurred for the sample bonded using the ACA with Ni particles, which was attributed to the formation of flip-chip joints without any entrapped Ni particles because of the least amount of Ni particles in the ACA.

• ETRI Journal
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• v.32 no.2
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• pp.327-329
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• 2010

A fully integrated small form-factor HBT power amplifier (PA) was developed for UMTS Tx applications. For practical use, the PA was implemented with a well configured bottom dimension, and a CMOS control IC was added to enable/disable the HBT PA. By using helix-on-pad integrated passive device output matching, a chip-stacking technique in the assembly of the CMOS IC, and embedding of the bulky inductive lines in a multilayer substrate, the module size was greatly reduced to 2 mm ${\times}$ 2.2 mm. A stage-bypass technique was used to enhance the efficiency of the PA. The PA showed a low idle current of about 20 mA and a PAE of about15% at an output power of 16 dBm, while showing good linearity over the entire operating power range.

• Journal of Information Display
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• v.13 no.1
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• pp.1-6
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• 2012

Decreasing the thermal resistance is the critical issue for high-brightness light-emitting diodes. In this paper, the effects of some design factors, such as chip size (24 and 35 mil), substrate material (AlN and high-temperature co-fired ceramic), and die-attach material (Ag epoxy and PbSn solder), on the thermal-dissipation characteristics were investigated. Using the thermal transient method, the temperature sensitivity parameter, $R_{th}$ (thermal resistance), and junction temperature were estimated. The 35-mil chip showed better thermal dissipation, leading to lower thermal resistance and lower junction temperature, owing to its smaller heat source density compared with that of the 24-mil chip. By adopting an AlN substrate and a PbSn solder, which have higher thermal conductivity, the thermal resistance of the 24-mil chip can be decreased and can be made the same as that of the 35-mil chip.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.3
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• pp.67-74
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• 2011

Keys to high wiring density semiconductor packages include flip-chip bonding and build-up substrate technologies. The current issues are the establishment of a fine pitch flip-chip bonding technology and a low coefficient of thermal expansion (CTE) substrate technology. In particular, electromigration and thermomigration in fine pitch flipchip joints have been recognized as a major reliability issue. In this paper, electromigration and thermomigration in Cu/Sn-3Ag-0.5Cu (SAC305)/Cu flip-chip joints and electromigration in Cu/In/Cu flip chip joints are investigated. In the electromigration test, a large electromigration void nucleation at the cathode, large growth of intermetallic compounds (IMCs) at the anode, a unique solder bump deformation towards the cathode, and the significantly prolonged electromigration lifetime with the underfill were observed in both types of joints. In addition, the effects of crystallographic orientation of Sn on electromigration were observed in the Cu/SAC305/Cu joints. In the thermomigration test, Cu dissolution was accelerated on the hot side, and formation of IMCs was enhanced on the cold side at a thermal gradient of about $60^{\circ}C$/cm, which was lower than previously reported. The rate of Cu atom migration was found comparable to that of electromigration under current conditions.

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.1776-1778
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• 2000

The demands placed on portable wireless communication equipment include low cost, low supply voltage, low power, dissipation, low noise, high frequency of operation, and low distortion. These design requirements cannot be met satisfactorily in many cases without the use of RF inductors. However, implementing the inductor on-chip has been regarded as an impractical task because of excessive substrate capacitance and substantial resistive losses due to metallization and the conductive silicon substrate. Hence, there is a great incentive to design, optimize, and model spiral inductors on Si substrate. So, we analyzed a chip inductors using electromagnetic analysis and established a set of design rules for rectangular spiral inductors.

• Journal of Welding and Joining
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• v.31 no.3
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• pp.4-10
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• 2013

In electronic industry, the trend of future electronics will be flexible, bendable, wearable electronics. Until now, there is few study on bonding technology and reliability of bonding joint between chip with micro solder bump and flexible substrate. In this study, we investigated joint properties of Si chip with eutectic Sn-58Bi solder bump on Cu pillar bump bonded on flexible substrate finished with ENIG by flip chip process. After flip chip bonding, we observed microstructure of bump joint by SEM and then evaluated properties of bump joint by die shear test, thermal shock test, and bending test. After thermal shock test, we observed that crack initiated between $Cu_6Sn_5IMC$ and Sn-Bi solder and then propagated within Sn-Bi solder and/or interface between IMC and solder. On the other hands, We observed that fracture propated at interface between Ni3Sn4 IMC and solder and/or in solder matrix after bending test.

• ETRI Journal
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• v.33 no.3
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• pp.335-343
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• 2011

The pad pitch of modern radio frequency integrated circuits is in the order of few tens of micrometers. Connecting a large number of high-speed I/Os to the outside world with good signal fidelity at low cost is an extremely challenging task. To cope with this requirement, we need reflection-free transmission lines from an on-chip pad to on-board SMA connectors. Such a transmission line is very hard to design due to the difference in on-chip and on-board feature size and the requirement for extremely large bandwidth. In this paper, we propose the use of narrow tracks close to chip and wide tracks away from the chip. This narrow-to-wide transition in width results in impedance discontinuity. A step change in substrate thickness is utilized to cancel the effect of the width discontinuity, thus achieving a reflection-free microstrip. To verify the concept, several microstrips were designed on multilayer FR4 PCB without any additional manufacturing steps. The TDR measurements reveal that the impedance variation is less than 3 ${\Omega}$ for a 50 ${\Omega}$ microstrip and S11 better than -9 dB for the frequency range 1 GHz to 6 GHz when the width changes from 165 ${\mu}m$ to 940 ${\mu}m$, and substrate thickness changes from 100 ${\mu}m$ to 500 ${\mu}m$.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.11a
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• pp.103-105
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• 2003

COG (Chip on Glass) technology using solder bump reflow has been investigated to attach IC chip directly on glass substrate of LCD panel. As It chip and LCD panel have to be heated to reflow temperature of the so]der bumps for COG bonding, it is necessary to use low-temperature solders to prevent the damage of liquid crystals of LCD panel. In this study, using the Sn-52In solder bumps of $40{\mu}m$ pitch size, solder joints between Si chip and glass substrate were made at temperature below $150^{\circ}C$. The contact resistance of the solder joint was $8.58m\Omega$, which was much lower than that of the joint made using the conventional ACF bonding technique. The Sn-52In solder joints with underfill showed excellent reliability at a hot humid environment.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.4
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• pp.40-46
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• 1998

Leakage phenomena of flip-chip structures on common GaAs and alumina main substrates are characterized using the spectral domain approach to reduce the possible chip-to-chip crosstald and transmission resonance. We have found taht the longitudinal section magnetic mode is dominant for the coplanar waveguide leakage andthe leakage can be suppreassed by properly managing the gap height and the main substrate thickness in addition to the dielectric constant. These calculation results will be helpful for designing and flip-chip packagaing of high-frequency integrated circuits.