• Title/Summary/Keyword: chip size package

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Estimate on related to Chip Set and the other Various Parameter in Electronic Plastic Package (반도체 패키지의 칩셋과 다른 설계변수와의 연관성 평가)

  • Kwon, Yong-Su
    • Journal of the Korean Society of Industry Convergence
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    • v.2 no.2
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    • pp.131-137
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    • 1999
  • Package crack caused by the soldering process in the surface mounting plastic package is evaluated by applying the energy release rate criterion. The package crack formation depend on various parameters such as chip set, chip size, package thickness, package width, material properties and the moisture content etc. The effects of chip set and the other parameters were estimated during the analysis of package cracks which were located in the edge of the upper interface of the chip and the lower interlace of the die pad. From the results, it could be obtained that the more significant parameters to effect the chip set are chip width.

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Study on the Thermal Dissipation Characteristics of 16-chip LED Package with Chip Size (16칩 LED 패키지에서 칩 크기에 따른 방열특성 연구)

  • Lee, Min-San;Moon, Cheol-Hee
    • Journal of the Korean Vacuum Society
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    • v.21 no.4
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    • pp.185-192
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    • 2012
  • p-n junction temperature and thermal resistance of Light Emitting Diode (LED) package are affected by the chip size due to the change of the thermal density and the external quantum efficiency considering the heat dissipation through conduction. In this study, forward voltage was measured for two different size LED chips, 24 mil and 40 mil, which consist constitute 16-chip package. p-n junction temperature and thermal resistance were determined by thermal transient analysis, which were discussed in connection with the electrical characteristics of the LED chip and the structure of the LED package.

Design and Fabrication of the System in Package for the Digital Broadcasting Receiver (디지털 방송 수신용 System in Package 설계 및 제작)

  • Kim, Jee-Gyun;Lee, Heon-Yong
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.1
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    • pp.107-112
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    • 2009
  • This paper describes design and fabrication issues of the SiP(System in Package) one-chip for a portable digital broadcasting receiver. It includes RF tuner chip, demodulator chip and passive components for the receiver system. When we apply the SiP one-chip technology to the broadcasting receiver, the system board size can be reduced from $776mm^2$ to $144mm^2$. SiP one-chip has an advantage that the area reduces more 81% than separated chips. Also the sensitivity performance advances -1dBm about 36 channels in the RF weak electric field, the power consumption reduces about 2mW and the C/N keeps on the same level.

Development of Fully Integrated Broadband MMIC Chip Set Employing CSP(Chip Size Package) for K/Ka Band Applications (CSP(Chip Size Package)를 이용한 완전집적화 K/Ka 밴드 광대역 MMIC Chip Set 개발)

  • Yun Young
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.1 s.92
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    • pp.102-112
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    • 2005
  • In this work, we developed fully integrated broadband MMIC chip set employing CSP(Chip Size Package) for K/Ka band applications. By utilizing an ACF for the RF-CSP, the fabrication process for the packaged amplifier MMIC could be simplified and made cost effective. $STO(SrTi_{3})$ capacitors were employed to integrate the DC biasing components on the MMIC, and LC parallel circuits were employed for DC feed and ESD protection. A pre-matching technique and RC parallel circuit were used to achieve a broadband matching and good stability fer the amplifier MMIC in K/Ka band. The amplifier CSP MMIC exhibited good RF performance over a wide frequency range in K/Ka band. This work is the first report of a fully integrated CSP amplifier MMIC successfully operating in the K/Ka band.

A Study on Machining Characteristics of the Ultraprecision Singualtion of Chip Size Package(CSP) (CSP의 초정밀 싱귤레이션 가공특성에 관한 연구)

  • 김성철;이은상
    • Transactions of the Korean Society of Machine Tool Engineers
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    • v.11 no.3
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    • pp.28-32
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    • 2002
  • Recently, the miniature of electric products such as notebook, cellular-phone etc. is apparently appeared, due to the smaller size of the semiconductor chips. As the size of chip gets smaller, the circuit could be easily damaged by the slightest influence, therefore it is important to investigate the machining quality of $\mu$ BGA. This paper deals with machining characteristics of the $\mu$ BGA singulation. The relationships between the singulation face and machining quality of the $\mu$ BGA singulation are investigated. It is confirmed that machining quality improves as the singulation force decreases.

High Integration Packaging Technology for RF Application

  • Lee, Young-Min
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 1999.12a
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    • pp.127-154
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    • 1999
  • Interconnect - Wire bonding-> Flip chip interconnect ; At research step, Au stud bump bonding seems to be more proper .Package -Plastic package-> $Z_{0}$ controlled land grid package -Flip Chip will be used for RF ICs and CSP for digital ICs -RF MCM comprised of bare active devices and integrated passive components -Electrical design skills are much more required in RF packaging .Passive Component -discrete-> integrated -Both of size and numbers of passive components must be reduced

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A Fully-integrated Ku/K Broadband Amplifier MMIC Employing a Novel Chip Size Package (새로운 형태의 CSP를 이용한 완전 집적화 Ku/K밴드 광대역 증폭기 MMIC)

  • Yun, Young
    • Journal of Navigation and Port Research
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    • v.27 no.2
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    • pp.217-221
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    • 2003
  • In this work, we used a novel RF-CSP to develop a broadband amplifier MMIC, including all the matching and biasing components, for Ku and K band applications. By utilizing an ACF for the RF-CSP, the fabrication process for the packaged amplifier MMIC could be simplified and made cost effective. STO (SrTiO$_3$) capacitors were employed to integrate the DC biasing components on the MMIC. A pre-matching technique was used for the gate input and drain output of the FETs to achieve a broadband design for the amplifier MMIC. The amplifier CSP MMIC exhibited good RF performance (Gain of 12.5$\pm$1.5 dB, return loss less than -6 dB, PldB of 18.5$\pm$1.5 dBm) over a wide frequency range. This work is the first report of a fully integrated CSP amplifier MMIC successfully operating in the Ku/K band.

Estimate of package crack reliabilities on the various parameters using taguchi's method (다꾸찌방법을 사용한 여러변수들이 패키지균열에 미치는 신뢰도 평가)

  • Kwon, Yong-Su;Park, Sang-Sun;Park, Jae-Wan;Chai, Young-Suck;Choi, Sung-Ryul
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.21 no.6
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    • pp.951-960
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    • 1997
  • Package crack caused by the soldering process in the surface mounting plastic package is evaluated by applying the maximum energy release rate criterion. It could be shown that the crack propagation from the lower edge of the ie pad is easily occurred at the maximum temperature during the soldering process, where the pressure acting on the crack surface is assumed by the saturated vapor pressure at maximum temperature. The package crack formation depends on various parameters such as chip size, relative thickness, material properties, the moisture content and soldering temperature etc. The quantitative measure of the effects of the parameters could be easily obtained by using the taguchi's method which requires only a few kinds of combinations with such parameters. From the results, it could be obtained that the more significant parameters to effect the package reliability are the orders of Young's modulus, die pad size, down set, chip thickness and maximum soldering temperature.

Research on the Correlation Effect of Innovation Activities on Innovators and Customers ${\sim}$ Using the IC Package and Testing Industries as an Example

  • Tien, Shiaw-Wen;Chung, Yi-Chan;Tsai, Chih-Hung;Dong, Chung-Yun
    • International Journal of Quality Innovation
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    • v.8 no.3
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    • pp.81-112
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    • 2007
  • In the competitive global market, firms have to keep profit from innovation activities. A firm makes profits by offering products or services at a lower cost than its competitors or by offering differentiated products at premium prices that more than compensate for the extra cost of differentiation. The IC Package and Testing technology industries were the first high technological industry to build in Taiwan. The Package and Testing industries in Taiwan adopted competitive innovation activities to become stronger. In our study, we want to know how innovation activities influence a firm operating in the IC Package and Testing industries. Our study used a questionnaire and Likert five-point scale to survey the innovation activities, customer and feedback in innovation performance in the IC Package and Testing industry. The wafer level chip size packing technology in our study indicates the innovation activities. Because we need to compare the difference between the wafer level chip size packing technology and wire bonding technology to recognize innovation and how the innovator and customer were influenced. Our conclusions are described below: (1) When the innovator adopts innovation activities that can be maintained using experiments and knowledge, using machine and decision variables more quickly will produce success; (2) Innovators should adopt innovation activities that focus on customers that use knowledge and experimentation, training time and cost. If an innovation forces customers to spend much time and cost to learn new technology or applications, the innovation will not be adopted; (3) Innovators that create innovation performance higher than his customers must also consider the impact upon their customers. We have to remind innovator to focus on why their customers have a different level of evolution in the same innovation activities.

Evaluation of Mechanical Properties and FEM Analysis on Thin Foils of Copper (구리 박막의 기계적 물성 평가 및 유한요소 해석)

  • Kim Yun-Jae;An Joong-Hyok;Park Jun-Hyub;Kim Sang-Joo;Kim Young-Jin;Lee Young-Ze
    • Tribology and Lubricants
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    • v.21 no.2
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    • pp.71-76
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    • 2005
  • This paper compares of mechanical tensile properties of 6 kinds of copper foil. The beam lead made with copper foil. Different from other package type such as plastic package, Chip Size Package has a reliability problem in beam lead rather than solder joint in board level. A new tensile loading system was developed using voice-coil actuator. The new tensile loading system has a load cell with maximum capacity of 20 N and a non-contact position measuring system based on the principle of capacitance micrometry with 0.1nm resolution for displacement measurement. Strain was calculated from the measured displacement using FE analysis. The comparison of mechanical properties helps designer of package to choose copper for ensuring reliability of beam lead in early stage of semiconductor development.