• The KIPS Transactions:PartA
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• v.16A no.2
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• pp.79-88
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• 2009

In boundary scan architecture, test stimuli are shifted in one at a time and applied to the on-chip system logic. The test results are captured into the BSR and are examined by subsequent shifting. In this paper, we developed a continuous capture test architecture and test procedure using TPG based on boundary scan is used to performance test. In this architecture, test patterns of TPG are applied to CUT with system clock rate, and response of CUT is continuously captured by CBSR(Continuous Capture Boundary Scan Register) at the same rate and the captured results is shifted to TDO at the same rate. The suggested a continuous capture test architecture and test procedure is simulated by Altera Max+Plus 10.0. The simulation results shows the accurate operation and effectiveness of the proposed test architecture and procedure.

• The KIPS Transactions:PartA
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• v.13A no.2 s.99
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• pp.101-110
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• 2006

One of the most effective ways to improve cache performance is to exploit both temporal and spatial locality given by any program executional characteristics. This paper proposes a data cache with small space for low power but high performance on multimedia applications. The basic architecture is a split-cache consisting of a direct-mapped cache with small block sire and a fully-associative buffer with large block size. To overcome the disadvantage of small cache space, two mechanisms are enhanced by considering operational behaviors of multimedia applications: an adaptive multi-block prefetching to initiate various fetch sizes and an efficient block filtering to remove rarely reused data. The simulations on MediaBench show that the proposed 5KB-cache can provide equivalent performance and reduce energy consumption up to 40% as compared with 16KB 4-way set associative cache.

• The KIPS Transactions:PartA
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• v.9A no.1
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• pp.1-8
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• 2002

Most of the traditional embedded web server systems have been designed for monitoring and controlling some dedicated equipments. Hence, not only they have no generality and flexibility but also they are too expensive for the lower-cost domestic equipment. To cope with these difficulty, we suggest a lower-cost ${\mu}$-embedded web server model which is suitable for monitoring and controlling the industry or house equipments by using the internet. The suggested model is based on an one-chip ${\mu}$-processor in which the ISP (In-System Programming) function and flash ROM are embedded basically to minimize the cost of H/W and S/W. Also it allows to add an new function dynamically to provide the generality and flexibility. Finally, to evaluate the feasibility of the suggested model, we have manufactured a test-board based on the ATMega103 ${\mu}$-processor and programmed the control program and tested it on the MS Explorer 5.0 environment.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.242-242
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• 2006

Increasingly complex tasks are performed by computers or cellular phone, requiring more and more memory capacity as well as faster and faster processing speeds. This leads to a constant need to develop more highly integrated circuit systems. Therefore, there have been numerous studies by many engineers investigating circuit patterning. In particular, PCB including module/package substrates such as FCB (Flip Chip Board) has been developed toward being low profile, low power and multi-functionalized due to the demands on miniaturization, increasing functional density of the boards and higher performances of the electric devices. Imprint lithography have received significant attention due to an alternative technology for photolithography on such devices. The imprint technique. is one of promising candidates, especially due to the fact that the expected resolution limits are far beyond the requirements of the PCB industry in the near future. For applying imprint lithography to FCB, it is very important to control thermal properties and mechanical properties of dielectric materials. These properties are very dependent on epoxy resin, curing agent, accelerator, filler and curing degree(%) of dielectric materials. In this work, the epoxy composites filled with silica fillers and cured with various accelerators having various curing degree(%) were prepared. The characterization of the thermal and mechanical properties wasperformed by thermal mechanical analysis (TMA), thermogravimetric analysis (TGA), differential scanning calorimetry (DSC), rheometer, an universal test machine (UTM).

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.10a
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• pp.354-361
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• 2005

In high speed cutting process, due to the friction between the tool and workpiece, a temperature rise of contacting part is serious. It need to develop cutting tool for overcoming such a poor condition. So now, some studies, the optimization of tool shapes, the fine grains of tool material, multi-layer coating of tools are processing. If mirror finishing on the tool is processed, there is advantage of relation between chip and tool, because of less friction, and also tool's lift would be increased. As a result mirror like finishing is expected efficient enhancement of tool. Generally, it is too difficult to process by a general way for tools of complex shapes, it is required a new method to process such complex shape tools. The magnetic fluid polishing technique can polish the workpiece of complex shape, because the polishing method which polishes as compress the workpiece by the magnetism abrasives to arrange to the linear according to the line of magnetic force. In this paper, We polished the surface of the high speed cutting tool using the magnetic fluid polishing technique, to enhance the performance of the high speed cutting tool.

• Journal of Advanced Navigation Technology
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• v.17 no.3
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• pp.332-345
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• 2013

In this paper, recently, it is described to the piezoelectric transformer technology develops, because it was have to favorable characteristics such as electromagnetic-noise free, compact size, higher efficiency, and superior power density, flux linkage, noiseless, etc. its resonance frequency was used to output waveform of a sine wave. A rotor speed identification method of induction motor based on the theory of flux model reference adaptive system(FMRAS). The estimator execute the rotor speed identification so that the vector control of the induction motor may be achieved. The improved auxiliary variable of the model are introduced to perform accurate rotor speed estimation. The control system is composed of the PI controller for speed control and the current controller using space voltage vector PWM techniuqe and DC-DC converter. High speed calculation and processing for vector control is carried out by digital signal one chip microprocessor. Validity of the proposed control method is verified through simulation and experimental results.

• Journal of the Korea Computer Industry Society
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• v.2 no.7
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• pp.975-982
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• 2001

In this study, a solid-state laser system adopting a new real time multi-discharge (RTMD) method in which three flashlamps are turned on consecutively was designed and fabricated to examine the pulse width and the pulse shape of the laser beams depending upon the changes in the lamp rum-on time. That is, this study shows a technology that makes it possible to make various pulse shapes by turning on three flashlamps consecutively on a real-time basis with the aid of a PIC one-chip microprocessor. With this technique, the lamp turn-on delay time can be varied more diversely from 0 to 10 ms and the real-time control is possible with an external keyboard, enabling various pulse shapes. In addition, longer pulses can be more widely used for industrial processing and lots of medical purposes

• The KIPS Transactions:PartB
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• v.10B no.7
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• pp.815-822
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• 2003

Fingerprint image enhancement and minutiae matching are two key steps in an automatic fingerprint identification system. In this paper, we propose a fingerprint recognition technique by using minutiae linking information. Recognition process have three steps ; preprocessing, minutiae extraction, matching step based on minutiae pairing. After extracting minutiae of a fingerprint from its thinned image for accuracy, we introduce matching process using minutiae linking information. Introduction of linking information into the minutiae matching process is a simple but accurate way, which solves the problem of reference minutiae pair selection with low cost in comparison stage of two fingerprints. This algorithm is invariable to translation and rotation of fingerprint. The matching algorithm was tested on 500 images from the semiconductor chip style scanner, experimental result revealed the false acceptance rate is decreased and genuine acceptance rate is increased than existing method.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.11
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• pp.2022-2030
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• 2008

System such as FA and breakup TC is applied by real time and need to manage. This paper studies data processing skill that can divide TC and data of much quantity with collection by real time. Modularize to several system, and use of computer communication network that interlink computers that can achieve control function of each systems to network is spreading. Develop that can take advantage of Ideonet communication method and transmit signal of channel because do multiplex all. Do data that have semi-conductor equipment or many input of LCD equipment and output node multiplex, and several units real time Ideonet communication that control is available use that all input of point of contact and output module develop.

• KIPS Transactions on Computer and Communication Systems
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• v.8 no.11
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• pp.251-262
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• 2019

In this paper, we propose a simulator that provides various algorithms of RBF networks on neuromorphic chips. To develop algorithms based on neuromorphic chips, the disadvantages of using simulators are that it is difficult to test various types of algorithms, although time is fast. This proposed simulator can simulate four times more types of network architecture than existing simulators, and it provides an additional a two-layer structure algorithm in particular, unlike RBF networks provided by existing simulators. This two-layer architecture algorithm is configured to be utilized for multiple input data and compared to the existing RBF for performance analysis and validation of utilization. The analysis showed that the two-layer structure algorithm was more accurate than the existing RBF networks.