• Title/Summary/Keyword: chip processing

Search Result 809, Processing Time 0.03 seconds

Cut off of Smartcard Forgery and Alteration Based on Holographic Security Encryption (홀로그래픽 암호화 기법을 적용한 스마트카드 위.변조 차단)

  • Jang, Hong-Jong;Lee, Seong-Eun;Lee, Jeong-Hyeon
    • The KIPS Transactions:PartC
    • /
    • v.9C no.2
    • /
    • pp.173-180
    • /
    • 2002
  • Smartcard is highlighted as infrastructure that has an excellent security for executing functions such as user authentication, access control, information storage and control, and its market is expanding rapidly. But possibilities of forgery and alteration by hacking are increasing as well. This Paper makes cut off of Smartcard forgery and alteration that use angular multiplexing and private key multiplexing hologram on holographic security Encryption, and proposes system capable verfication of forgery and alteration impossible on existing smartrard by adopting smartcard chip and holographic memory chip.

Microflow of dilute colloidal suspension in narrow channel of microfluidic-chip under Newtonian fluid slip condition

  • Chun Myung-Suk;Lee Tae Seok;Lee Kangtaek
    • Korea-Australia Rheology Journal
    • /
    • v.17 no.4
    • /
    • pp.207-215
    • /
    • 2005
  • We present a finite difference solution for electrokinetic flow in rectangular microchannels encompassing Navier's fluid slip phenomena. The externally applied body force originated from between the nonlinear Poisson-Boltzmann field around the channel wall and the flow-induced electric field is employed in the equation of motion. The basic principle of net current conservation is applied in the ion transport. The effects of the slip length and the long-range repulsion upon the velocity profile are examined in conjunction with the friction factor. It is evident that the fluid slip counteracts the effect by the electric double layer and induces a larger flow rate. Particle streak imaging by fluorescent microscope and the data processing method developed ourselves are applied to straight channel designed to allow for flow visualization of dilute latex colloids underlying the condition of simple fluid. The reliability of the velocity profile determined by the flow imaging is justified by comparing with the finite difference solution. We recognized the behavior of fluid slip in velocity profiles at the hydrophobic surface of polydimethylsiloxane wall, from which the slip length was evaluated for different conditions.

Development of Micro-chip Removal Equipment Using Bubble (버블을 이용한 미세칩 제거장치의 개발)

  • Choi, Sung-Yun;Kwon, Dae-Gyu;Lee, Sea-Han;Park, Tae-hyun;Wang, Duck Hyun
    • Journal of the Korean Society of Manufacturing Process Engineers
    • /
    • v.20 no.10
    • /
    • pp.88-94
    • /
    • 2021
  • Machining operations require the removal of chips to keep the water-soluble cutting oil clean and fresh throughout the operation time. Water-soluble cutting oil for metal processing is diluted using a 3-8% solution in water which is generally replaced every three to six months. This study aims to develop multiple purification devices to efficiently remove fine contaminating particles from water-soluble cutting oil. The 2D concept designs were created using AutoCAD. The designs were drawn using the 3D modelling feature of CATIA. Flow analysis was performed in a bubble purifier using Ansys computational fluid dynamics (CFD). This analysis has aided in improving the design and structure of the device to create the final prototype. Experiments were conducted to check the prototype's performance. Comparisons of the effects of each process variable on the experiment was carried out using ANOVA.

Inertial Microfluidics-Based Cell Sorting

  • Kim, Ga-Yeong;Han, Jong-In;Park, Je-Kyun
    • BioChip Journal
    • /
    • v.12 no.4
    • /
    • pp.257-267
    • /
    • 2018
  • Inertial microfluidics has attracted significant attention in recent years due to its superior benefits of high throughput, precise control, simplicity, and low cost. Many inertial microfluidic applications have been demonstrated for physiological sample processing, clinical diagnostics, and environmental monitoring and cleanup. In this review, we discuss the fundamental mechanisms and principles of inertial migration and Dean flow, which are the basis of inertial microfluidics, and provide basic scaling laws for designing the inertial microfluidic devices. This will allow end-users with diverse backgrounds to more easily take advantage of the inertial microfluidic technologies in a wide range of applications. A variety of recent applications are also classified according to the structure of the microchannel: straight channels and curved channels. Finally, several future perspectives of employing fluid inertia in microfluidic-based cell sorting are discussed. Inertial microfluidics is still expected to be promising in the near future with more novel designs using various shapes of cross section, sheath flows with different viscosities, or technologies that target micron and submicron bioparticles.

BUMPLESS FLIP CHIP PACKAGE FOR COST/PERFORMANCE DRIVEN DEVICES

  • Lin, Charles W.C.;Chiang, Sam C.L.;Yang, T.K.Andrew
    • Proceedings of the International Microelectronics And Packaging Society Conference
    • /
    • 2002.09a
    • /
    • pp.219-225
    • /
    • 2002
  • This paper presents a novel "bumpless flip chip package"for cost! performance driven devices. Using the conventional electroplating and etching processes, this package enables the production of fine pitch BGA up to 256 I/O with single layer routing. An array of circuitry down to $25-50{\mu}{\textrm}{m}$ line/space is fabricated to fan-in and fan-out of the bond pads without using bumps or substrate. Various types of joint methods can be applied to connect the fine trace and the bond pad directly. The resin-filled terminal provides excellent compliancy between package and the assembled board. More interestingly, the thin film routing is similar to wafer level packaging whereas the fan-out feature enables high lead count devices to be accommodated in the BGA format. Details of the design concepts and processing technology for this novel package are discussed. Trade offs to meet various cost or performance goals for selected applications are suggested. Finally, the importance of design integration early in the technology development cycle with die-level and system-level design teams is highlighted as critical to an optimal design for performance and cost.

  • PDF

Lightweight FPGA Implementation of Symmetric Buffer-based Active Noise Canceller with On-Chip Convolution Acceleration Units (온칩 컨볼루션 가속기를 포함한 대칭적 버퍼 기반 액티브 노이즈 캔슬러의 경량화된 FPGA 구현)

  • Park, Seunghyun;Park, Daejin
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.26 no.11
    • /
    • pp.1713-1719
    • /
    • 2022
  • As the noise canceler with a small processing delay increases the sampling frequency, a better-quality output can be obtained. For a single buffer, processing delay occurs because it is impossible to write new data while the processor is processing the data. When synthesizing with anti-noise and output signal, this processing delay creates additional buffering overhead to match the phase. In this paper, we propose an accelerator structure that minimizes processing delay and increases processing speed by alternately performing read and write operations using the Symmetric Even-Odd-buffer. In addition, we compare the structural differences between the two methods of noise cancellation (Fast Fourier Transform noise cancellation and adaptive Least Mean Square algorithm). As a result, using an Symmetric Even-Odd-buffer the processing delay was reduced by 29.2% compared to a single buffer. The proposed Symmetric Even-Odd-buffer structure has the advantage that it can be applied to various canceling algorithms.

A Realization Method of DS/SS System for A Cyclic Noise Adaptation on Power Line Channels (전력선 채널의 주기적 잡음 적응형 DS/SS 시스템의 구현 방법)

  • Jung, Kwang-Hyun;Park, Chong-Yeun
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.47 no.2
    • /
    • pp.47-55
    • /
    • 2010
  • The power line communication channel has characteristic variation problems which are caused by load. The spread spectrum technique has been used to overcome these problems. One of that is the direct sequence spread spectrum(DS/SS) system which is not necessary to additional hardwares. The BER of DS/SS system is decreased by longer length of PN code, but data transfer rate is decreases, so data transfer rate is hard to satisfies their own specifications especially in narrowband PLC systems. Spread Spectrum system with Dual-processing Gain tries to reflect cyclic characteristics of power line noise. But that system assumes that shapes of power line channel are symmetrical with respect to the 1/4 point of main frequency(60Hz in Korea), therefore cannot achieves various shapes of real power line noise. Thus in this paper, noise adaptive DS/SS system which PN code is changed by noise levels for various channel noises is proposed and simulated. The different kinds of noises are modeled and measured for simulation, the proposed system is verified that has lower data transfer rate and lower error rate than conventional system by simulation results.

Signal Processing of the Continuous-Wave Radar for Approach and Retreat of Targets Using I and Q Channels (I/Q 채널을 이용한 연속파 레이다의 표적 접근/후퇴 신호처리)

  • Cho, Choon Sik
    • Journal of Satellite, Information and Communications
    • /
    • v.12 no.1
    • /
    • pp.34-37
    • /
    • 2017
  • This letter presents the signal processing of a CW radar (Continuous Wave or Doppler radar) sensor which enables the radar to detect the multiple targets' approaching and retreating using both I and Q channels. The proposed algorithm utilizes the phase change of the Quadrature signal, which occurs when targets move back and forth from the radar. The verification is carried out with the board containing a commercially available MMIC chip and an MCU by analyzing the received data from MMIC. Also the proposed algorithm is downloaded to MCU and the approaching and retreating movement is confirmed. The CW frequency is 24.125 GHz and the transmitter output power used is 7.2 dBm. Detectable distance is about 12 m.

A Real-Time Implementation of Speech Recognition System Using Oak DSP core in the Car Noise Environment (자동차 환경에서 Oak DSP 코어 기반 음성 인식 시스템 실시간 구현)

  • Woo, K.H.;Yang, T.Y.;Lee, C.;Youn, D.H.;Cha, I.H.
    • Speech Sciences
    • /
    • v.6
    • /
    • pp.219-233
    • /
    • 1999
  • This paper presents a real-time implementation of a speaker independent speech recognition system based on a discrete hidden markov model(DHMM). This system is developed for a car navigation system to design on-chip VLSI system of speech recognition which is used by fixed point Oak DSP core of DSP GROUP LTD. We analyze recognition procedure with C language to implement fixed point real-time algorithms. Based on the analyses, we improve the algorithms which are possible to operate in real-time, and can verify the recognition result at the same time as speech ends, by processing all recognition routines within a frame. A car noise is the colored noise concentrated heavily on the low frequency segment under 400 Hz. For the noise robust processing, the high pass filtering and the liftering on the distance measure of feature vectors are applied to the recognition system. Recognition experiments on the twelve isolated command words were performed. The recognition rates of the baseline recognizer were 98.68% in a stopping situation and 80.7% in a running situation. Using the noise processing methods, the recognition rates were enhanced to 89.04% in a running situation.

  • PDF

Development of a Robotic Milking Cluster System (착유 자동화를 위한 로봇 착탈 시스템)

  • 이대원;최동윤;김현태;이원희;권두중;이승기;한정대
    • Journal of Animal Environmental Science
    • /
    • v.6 no.2
    • /
    • pp.113-119
    • /
    • 2000
  • A Robotic milking cluster system with the manipulator for an automatic milking system was designed and built for farmer to work easily and comfortably during milking processing. The cluster system was composed of screws, cams and links for power transmission, DC motors, the Quick Basic one-chip microprocessor, the vision system for image processing, and tea-cups. Software, written in Visual C+ and Quick Basic, combined the function of image capture, image processing, milking cluster control, and control into one control. The unit was made to transfer from four fixed points to four teats with four teat-cups. Performance tests of the cluster unit, the fully integrated system, were conducted to attach and detach the teat-cup on the teat of a artificial cow. The transfer programming provided for a teat-cup milking loop during the system starts and comes back the original fixed point at the manipulator of it for milking. It transferred the teat-cup with a success rate of more than 70%. The average time it took ot perform the milking loop was about 20 seconds.

  • PDF