• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.1011-1014
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• 2004

In this paper, we present a new DC-DC converter for gate driver circuit in low temperature poly-Si TFT technology. It is composed of a newly developed charge pump circuit and a regulator circuit. When the input voltage is 5V, the efficiency of a positive charge pump used in the DC-DC converter and that of a negative charge pump is 69.0% and 57.1%, respectively. The output voltage of DC-DC converter varies 200mV when the target voltages of DC-DC converter are 9V, -6V and the threshold voltage of TFTs varies ${\pm}$ 0.5V.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.227-230
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• 2001

This paper deals with a bidirectional ac-dc converter used in ups system application. We propose a Voltage-Source-Charge-Pump-Power-Factor-Correction(VS-CPPFC) ac-dc converters. First of all, we propose a charge pump power-factor-correction converter. Secondly, we derive and analyse a unity power factor condition. The proposed topology is based on a half-bridge for the primary and a current-fed push pull for the secondary side of a high frequency isolation transformer. The advantage of bidirectional flow of power achieved by using the same power components is that the circuit is simple and efficient. And the galvanically isolated topology is specially attractive in battery charge/discharge circuits in ups system. We design equivalent model for the steady-state circuit and analyse operation waveforms for each mode. We show that the proposed model can be applied to ups system by simulation processes.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권1호
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• pp.83-91
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• 2014

This paper presents a capacitive readout circuit for tri-axes microaccelerometer with sub-fF offset calibration capability. A charge sensitive amplifier (CSA) with correlated double sampling (CDS) and digital to equivalent capacitance converter (DECC) is proposed. The DECC is implemented using 10-bit DAC, charge transfer switches, and a charge-storing capacitor. The DECC circuit can realize the equivalent capacitance of sub-fF range with a smaller area and higher accuracy than previous offset cancelling circuit using series-connected capacitor arrays. The readout circuit and MEMS sensing element are integrated in a single package. The supply voltage and the current consumption of analog blocks are 3.3 V and $230{\mu}A$, respectively. The sensitivities of tri-axes are measured to be 3.87 mg/LSB, 3.87 mg/LSB and 3.90 mg/LSB, respectively. The offset calibration which is controlled by 10-bit DECC has a resolution of 12.4 LSB per step with high linearity. The noise levels of tri-axes are $349{\mu}g$/${\sqrt}$Hz, $341{\mu}g$/${\sqrt}$Hz and $411{\mu}g$/${\sqrt}$Hz, respectively.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2007년도 하계학술대회 논문집
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• pp.350-352
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• 2007

Modularized charge equalization converter for HEV lithium-ion battery cells is proposed in this paper, in which intra-module and inter-module charge equalization can be achieved at the same time. For intra-module charge equalization, the conventional flyback DC/DC converters of low power and small size are employed, in which all of the primary sides are coupled in parallel for selective charge of the specific under charged cell within the module. For inter-module charge equalization, the flyback DC/DC converters are also added, in which all the secondary windings are electrically linked in parallel for automatic charge balancing among the modules. An engineering sample of forty cells hiring the proposed cell balancing scheme is implemented and its experimental result shows that the proposed modularized charge equalization circuit has good cell balancing performance.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 하계종합학술대회 논문집(2)
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• pp.473-476
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• 2004

AS supply voltage of DRAM is scaled down, voltage circuit that is stable from external noise is more important. $V_{PP}$ voltage is very important, it is biased to gate of memory cell transistor and possible to read and write without voltage down. It has both high pump gain and high power efficiency therefore charge pump circuit is proposed. The circuit is simulated by 0.18${\mu}m$ memory process and 1.2V supply voltage. Compare to CCTS, it is improved 0.43V of pump gain, $3.06\%$ of power efficiency at 6 stage.

• 대한전자공학회논문지SD
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• 제45권4호
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• pp.137-145
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• 2008

본 논문에서는 출력 단 전달 스위치로 NMOS와 PMOS를 병렬 결합하여 사용하고 벌크 펌핑 회로를 채용한 CMOS 전하펌프를 제안하였다. 제안된 전하 펌프는 NMOS 및 PMOS의 병렬 결합을 통하여 출력 단의 전류전달 능력을 향상시킬 수 있다. 또한, 채용된 벌크 펌핑 회로는 PMOS에 의한 벌크의 순방향 바이어스 문제를 효과적으로 해결할 수 있다. 제안된 회로의 성능을 확인하기 위하여, 80-nm CMOS 공정기술을 이용하여 전하 펌프를 설계하였다. 모사실험을 통한 비교 결과, 제안된 CMOS 전하 펌프는 기존의 NMOS 혹은 PMOS 만을 사용한 전하 펌프들과 비교하여 47% 이상의 전류전달 능력의 향상을 가져왔고 펌핑 속도도 9% 이상 개선되었으며, 동작 시 최대 벌크 순방향 전압 또한 24%이상 개선되어 벌크 순방향 바이어스 문제가 완화되었음을 확인하였다.

• 조명전기설비학회논문지
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• 제26권8호
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• pp.1-7
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• 2012

In this paper, a new LED driving circuit which is able to control dimming of LED is proposed using charge pump. The proposed LED driving circuit steps down the input voltage to operate LED without DC-DC converter. The operation of this driving circuit is verified by P-Spice simulation, and the characteristics of the driving circuit is measured and evaluated in the experiments. As a result, the driving circuit efficiency of 88.5[%] is obtained when all LEDs are turned on by digital control method at the highest dimming level(255/255).

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2002년도 International Meeting on Information Display
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• pp.605-608
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• 2002

This paper proposes a real-time wall charge measurement circuit for three-electrode AC PDP. It includes a charge-compensation network, current-integrating capacitors, initializing switches, and an op-amp. With this equipment, we measure the wall charge variations for the effects of sustain voltage, sustain pulse width, sustain frequency, and neighboring cells.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2008년도 하계학술대회 논문집
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• pp.544-546
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• 2008

An improved dual-path energy recovery circuit (ERC) using a current source and a voltage source for plasma display panel (PDP) is proposed. The proposed ERC uses the voltage source to charge a panel and the current source to discharge the panel. Thus, the proposed circuit can make the panel charge to $V_S$ and discharge to 0V, fully and it is possible to achieve zero voltage switching (ZVS) of all switches in H-bridge inverter and zero current switching (ZCS) of all switches in the ERC. Moreover, it has less conduction and switching loss in ERC devices by the dual energy recovery paths for charging and discharging the panel. Furthermore, it has features of canceling the gas discharge current, high performance and the low cost ERC components. The operation principle and features of the proposed ERC are presented in detail and verified with 42-inch SD PDP.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2008년도 하계학술대회 논문집
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• pp.416-418
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• 2008

Cost effective and high efficiency energy recovery circuit (ERC) using an address voltage source is proposed. Different from prior ERC, the proposed circuit uses a voltage source to charge a panel and a current source to discharge the panel. As a result, it can be achieved zero voltage switching (ZVS) of switches in H-bridge inverter and zero current switching (ZCS) of switches of the ERC. Moreover, the proposed ERC can obtain high efficiency, high performance and the decrease of the cost and the size.