• Title/Summary/Keyword: channel decoder

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An FPGA Implementation of High-Speed Flexible 27-Mbps 8-StateTurbo Decoder

  • Choi, Duk-Gun;Kim, Min-Hyuk;Jeong, Jin-Hee;Jung, Ji-Won;Bae, Jong-Tae;Choi, Seok-Soon;Yun, Young
    • ETRI Journal
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    • v.29 no.3
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    • pp.363-370
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    • 2007
  • In this paper, we propose a flexible turbo decoding algorithm for a high order modulation scheme that uses a standard half-rate turbo decoder designed for binary quadrature phase-shift keying (B/QPSK) modulation. A transformation applied to the incoming I-channel and Q-channel symbols allows the use of an off-the-shelf B/QPSK turbo decoder without any modifications. Iterative codes such as turbo codes process the received symbols recursively to improve performance. As the number of iterations increases, the execution time and power consumption also increase. The proposed algorithm reduces the latency and power consumption by combination of the radix-4, dual-path processing, parallel decoding, and early-stop algorithms. We implement the proposed scheme on a field-programmable gate array and compare its decoding speed with that of a conventional decoder. The results show that the proposed flexible decoding algorithm is 6.4 times faster than the conventional scheme.

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A recursive trellis decoder using feedback data in ATSC DTV receivers (ATSC DTV 수신기에서 피드백을 갖는 트렐리스 복호기)

  • Oh, Young-Ho;Lee, Kyoung-Won;Kim, Dae-Jin
    • Journal of Broadcast Engineering
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    • v.12 no.6
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    • pp.641-648
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    • 2007
  • The decoding structure of up-to-date ATSC DTV receivers is well optimized, and it seems that 14.6 dB is the unbreakable minimum SNR in the AWGN channel. But the SNR satisfying the Shannon capacity of DTV receivers is 11.76 dB, So, the SNR gab between the 14.6 dB and the 11.76 dB is about 2.8 dB. In order to approach the Shannon capacity we propose a recursive trellis decoder which uses reliable feedback data obtained by an RS decoder. The performance enhancement of about 0.8 dB can be achieved in case of the AWGN channel.

Enhanced Belief Propagation Polar Decoder for Finite Lengths (유한한 길이에서 성능이 향상된 BP 극 복호기)

  • Iqbal, Shajeel;Choi, Goangseog
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.11 no.3
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    • pp.45-51
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    • 2015
  • In this paper, we discuss the belief propagation decoding algorithm for polar codes. The performance of Polar codes for shorter lengths is not satisfactory. Motivated by this, we propose a novel technique to improve its performance at short lengths. We showed that the probability of messages passed along the factor graph of polar codes, can be increased by multiplying the current message of nodes with their previous message. This is like a feedback path in which the present signal is updated by multiplying with its previous signal. Thus the experimental results show that performance of belief propagation polar decoder can be improved using this proposed technique. Simulation results in binary-input additive white Gaussian noise channel (BI-AWGNC) show that the proposed belief propagation polar decoder can provide significant gain of 2 dB over the original belief propagation polar decoder with code rate 0.5 and code length 128 at the bit error rate (BER) of $10^{-4}$.

Fully parallel low-density parity-check code-based polar decoder architecture for 5G wireless communications

  • Dinesh Kumar Devadoss;Shantha Selvakumari Ramapackiam
    • ETRI Journal
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    • v.46 no.3
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    • pp.485-500
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    • 2024
  • A hardware architecture is presented to decode (N, K) polar codes based on a low-density parity-check code-like decoding method. By applying suitable pruning techniques to the dense graph of the polar code, the decoder architectures are optimized using fewer check nodes (CN) and variable nodes (VN). Pipelining is introduced in the CN and VN architectures, reducing the critical path delay. Latency is reduced further by a fully parallelized, single-stage architecture compared with the log N stages in the conventional belief propagation (BP) decoder. The designed decoder for short-to-intermediate code lengths was implemented using the Virtex-7 field-programmable gate array (FPGA). It achieved a throughput of 2.44 Gbps, which is four times and 1.4 times higher than those of the fast-simplified successive cancellation and combinational decoders, respectively. The proposed decoder for the (1024, 512) polar code yielded a negligible bit error rate of 10-4 at 2.7 Eb/No (dB). It converged faster than the BP decoding scheme on a dense parity-check matrix. Moreover, the proposed decoder is also implemented using the Xilinx ultra-scale FPGA and verified with the fifth generation new radio physical downlink control channel specification. The superior error-correcting performance and better hardware efficiency makes our decoder a suitable alternative to the successive cancellation list decoders used in 5G wireless communication.

The performance of neural convolutional decoders on the satellite channels with nonlinear distortion (비선형 왜곡을 가진 위성 채널상에서 신경회로망 콘볼루션 복호기(NCD)의 성능)

  • 유철우;강창언;홍대식
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.8
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    • pp.2109-2118
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    • 1996
  • The neural convolutional decoder(NCD) was proposed as a method of decoding convolutional codes. In this paper, simulation results are presented for coherent BPSK in memoryless AWGN channels and coherent QPSK in the satellite channels. The NCD can learn the nonlinear distortion caused by the charactersitics of the satellite channel including the filtering effects and the nonlinear effects of the travling wave tube amplifier(TWTA). Thus, as compared with the AWGN channel, the performance difference in the satellite channel between the NCD for the systematic code and the Viterbi decoder for the nonsystematic code is reduced.

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An efficient punctured-coded TCM for the mobile satellite channel (이동 위성 채널에서 효율적인 Punctured TCM 방식)

  • 박성경;김종일;홍성권;주판유;강창언
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.8
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    • pp.2063-2076
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    • 1996
  • In this thesis, in order to apply a punctured convolutional codes to the trellis coded modulation(TCM), an efficient punctured trellis coded modulation(PTCM) based on the decomposition of the metric into orthogonal components is presented. Also, a simulation is performed in an additive white Gaussian noise(AWGN) and a rician fading channel modeling the mobile satellite channel. The PTCM combines punctured convolutional coding with MPSK modulation to provide a large coding gain in a power-limited or bandwidth-limited channel. However, in general the use of the punctured convolutional code structure in the decoder results in a performance loss in comparison to trellis codes, due to difficulties in assigning metrics. But, the study shows no loss in performance for punctured trellis coded MPSK in comparison to TCM, and what is more, the punctured convolutional codes results in some savings in the complexity of Viterbi decoders, compared to TCM of the same rate. Also, the results shows that the punctured trellis coded .pi./8 shift 8PSK is an attractive scheme for power-limited and band-limited systems and especially, the Viterbi decoder with first and Lth phase difference metrics improves BER performance by the mobile satellite channel.

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A Design of RS Decoder for MB-OFDM UWB (MB-OFDM UWB 를 위한 RS 복호기 설계)

  • Choi, Sung-Woo;Shin, Cheol-Ho;Choi, Sang-Sung
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2005.11a
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    • pp.131-136
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    • 2005
  • UWB is the most spotlighted wireless technology that transmits data at very high rates using low power over a wide spectrum of frequency band. UWB technology makes it possible to transmit data at rate over 100Mbps within 10 meters. To preserve important header information, MB-OFDM UWB adopts Reed-Solomon(23,17) code. In receiver, RS decoder needs high speed and low latency using efficient hardware. In this paper, we suggest the architecture of RS decoder for MB-OFDM UWB. We adopts Modified-Euclidean algorithm for key equation solver block which is most complex in area. We suggest pipelined processing cell for this block and show the detailed architecture of syndrome, Chien search and Forney algorithm block. At last, we show the hardware implementation results of RS decoder for ASIC implementation.

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A Robust Speaker Identification Using Optimized Confidence and Modified HMM Decoder (최적화된 관측 신뢰도와 변형된 HMM 디코더를 이용한 잡음에 강인한 화자식별 시스템)

  • Tariquzzaman, Md.;Kim, Jin-Young;Na, Seung-Yu
    • MALSORI
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    • no.64
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    • pp.121-135
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    • 2007
  • Speech signal is distorted by channel characteristics or additive noise and then the performances of speaker or speech recognition are severely degraded. To cope with the noise problem, we propose a modified HMM decoder algorithm using SNR-based observation confidence, which was successfully applied for GMM in speaker identification task. The modification is done by weighting observation probabilities with reliability values obtained from SNR. Also, we apply PSO (particle swarm optimization) method to the confidence function for maximizing the speaker identification performance. To evaluate our proposed method, we used the ETRI database for speaker recognition. The experimental results showed that the performance was definitely enhanced with the modified HMM decoder algorithm.

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Architecture of RS decoder for MB-OFDM UWB

  • Choi, Sung-Woo;Choi, Sang-Sung;Lee, Han-Ho
    • Proceedings of the Korea Society of Information Technology Applications Conference
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    • 2005.11a
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    • pp.195-198
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    • 2005
  • UWB is the most spotlighted wireless technology that transmits data at very high rates using low power over a wide spectrum of frequency band. UWB technology makes it possible to transmit data at rate over 100Mbps within 10 meters. To preserve important header information, MBOFDM UWB adopts Reed-Solomon(23,17) code. In receiver, RS decoder needs high speed and low latency using efficient hardware. In this paper, we suggest the architecture of RS decoder for MBOFDM UWB. We adopts Modified-Euclidean algorithm for key equation solver block which is most complex in area. We suggest pipelined processing cell for this block and show the detailed architecture of syndrome, Chien search and Forney algorithm block. At last, we show the hardware implementation results of RS decoder for ASIC implementation.

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A Simplified Efficient Algorithm for Blind Detection of Orthogonal Space-Time Block Codes

  • Pham, Van Su;Mai, Linh;Lee, Jae-Young;Yoon, Gi-Wan
    • Journal of information and communication convergence engineering
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    • v.6 no.3
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    • pp.261-265
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    • 2008
  • This work presents a simplified efficient blind detection algorithm for orthogonal space-time codes(OSTBC). First, the proposed decoder exploits a proper decomposition approach of the upper triangular matrix R, which resulted from Cholesky-factorization of the composition channel matrix, to form an easy-to-solve blind detection equation. Secondly, in order to avoid suffering from the high computational load, the proposed decoder applies a sub-optimal QR-based decoder. Computer simulation results verify that the proposed decoder allows to significantly reduce computational complexity while still satisfying the bit-error-rate(BER) performance.