• Title/Summary/Keyword: cell loss probability

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QoS-based Scheduling Algorithm for ATM in the Broadband Access Networks (가입자망에서의 서비스 품질 기반ATM 스케줄링 알고리즘)

  • 정연서;오창석
    • Journal of the Korea Society of Computer and Information
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    • v.6 no.1
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    • pp.67-73
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    • 2001
  • This paper proposes a new scheduling algorithm for broadband ATM access network. The existed scheduling algorithms (Train, Chao. Dynamic scheduling algorithm) have high cell loss rate and waste channel. These proposed mechanism utilize to control of multimedia services based on the quality of service level of the input traffic This paper suggests a functional architecture of scheduling and the scheduling algorithm to satisfy various QoS requirements. The performance measures of interest, namely steady-state cell loss probability and average delay, average delay, are discussed by simulation results.

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Performance Evaluation of a Cell Reassembly Mechanism with Individual Buffering in an ATM Switching System

  • Park, Gwang-Man;Kang, Sung-Yeol;Han, Chi-Moon
    • ETRI Journal
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    • v.17 no.1
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    • pp.23-36
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    • 1995
  • We present a performance evaluation model of cell reassembly mechanism in an ATM switching system. An ATM switching system may be designed so that communications between processors of its control part can be performed via its switching network rather than a separate inter-processor communications network. In such a system, there should be interface to convert inter-processor communication traffic from message format to cell format and vice versa, that is, mechanisms to perform the segmentation and reassembly sublayer. In this paper, we employ a continuous-time Markov chain for the performance evaluation model of cell reassembly mechanism with individual buffering, judicially defining the states of the mechanism. Performance measures such as message loss probability and average reassembly delay are obtained in closed forms. Some numerical illustrations are given for the performance analysis and dimensioning of the cell reassembly mechanism.

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A Study for Improving Performance of ATM Multicast Switch (ATM 멀티캐스트 스위치의 성능 향상을 위한 연구)

  • 이일영;조양현;오영환
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.12A
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    • pp.1922-1931
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    • 1999
  • A multicast traffic’s feature is the function of providing a point to multipoints cell transmission, which is emerging from the main function of ATM switch. However, when a conventional point-to-point switch executes a multicast function, the excess load is occurred because unicast cell as well as multicast cell passed the copy network. Additionally, due to the excess load, multicast cells collide with other cells in a switch. Thus a deadlock that losses cells raises, extremely diminishes the performance of switch. An input queued switch also has a defect of the HOL (Head of Line) blocking that less lessens the performance of the switch. In the proposed multicast switch, we use shared memory switch to reduce HOL blocking and deadlock. In order to decrease switch’s complexity and cell's processing time, to improve a throughput, we utilize the method that routes a cell on a separated paths by traffic pattern and the scheduling algorithm that processes a maximum 2N cell at once in the control part. Besides, when cells is congested at an output port, a cell loss probability increases. Thus we use the Output Memory (OM) to reduce the cell loss probability. And we make use of the method that stores the assigned memory (UM, MM) with a cell by a traffic pattern and clears the cell of the Output memory after a fixed saving time to improve the memory utilization rate. The performance of the proposed switch is executed and compared with the conventional policy under the burst traffic condition through both the analysis based on Markov chain and simulation.

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Performance evaluation of the input and output buffered knockout switch

  • Suh, Jae-Joon;Jun, Chi-Hyuck;Kim, Young-Si
    • Korean Management Science Review
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    • v.10 no.1
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    • pp.139-156
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    • 1993
  • Various ATM switches have been proposed since Asynchronous Transfer Mode (ATM) was recognized as appropriate for implementing broadband integrated services digital network (BISDN). An ATM switching network may be evaluated on two sides : traffic performances (maximum throughput, delay, and packet loss probability, etc.) and structural features (complexity, i.e. the number of switch elements necessary to construct the same size switching network, maintenance, modularity, and fault tolerance, etc.). ATM switching networks proposed to date tend to show the contrary characteristics between structural features and traffic performance. The Knockout Switch, which is well known as one of ATM switches, shows a good traffic performance but it needs so many switch elements and buffers. In this paper, we propose an input and output buffered Knockout Switch for the purpose of reducing the number of switch elements and buffers of the existing Knockout Switch. We analyze the traffic performance and the structural features of the proposed switching architecture through a discrete time Markov chain and compare with those of the existing Knockout Switch. It was found that the proposed architecture could reduce more than 40 percent of switch elements and more than 30 percent of buffers under a given requirement of cell loss probability of the switch.

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Resource Allocation Scheme Using Small Feedback Overhead in Downlink Non-Orthogonal Multiple Access Systems (하향링크 비직교 다중 접속 시스템에서 적은 피드백 오버헤드를 이용하는 자원 할당 기법)

  • Lee, In-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.26 no.7
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    • pp.1040-1046
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    • 2022
  • In this paper, we consider a system with massive user equipments (UEs) in a cell and assume path loss and Rayleigh fading channels between the base station (BS) and UEs. In addition, it is assumed that the system bandwidth consists of multiple identical frequency subchannels. Under such assumptions, we propose a channel state information (CSI) feedback scheme and a resource allocation scheme for non-orthogonal multiple access (NOMA) transmission in order to reduce the feedback overhead of CSI generated by massive UEs and to reduce the complexity of resource allocation. In particular, for the proposed schemes, we analyze the sum data rate achievable by massive UEs in a cell and the outage probability with which the UEs in a cell do not meet the target data rate. Through the simulation results, we show that the proposed schemes can provide the superior outage probability, although it degrades the average sum data rate.

Performances of wireless ATM cell transmission with partial concatenated coding (무선 ATM셀 전송을 위한 부분 연쇄 부호화 기법의 성능분석)

  • 이진호;김태중;이동도;안재영;황금찬
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.9
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    • pp.2014-2026
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    • 1997
  • In this paper, the performances of wireless asynchronous transfer mode (ATM) cell transmission in mobile work are analyzed. We adopt 16Star QAM as amodulation technique in wireless channel and considered Reed-Solomon, convolutional, and concatenated coding to improve the error rate performances, and also proposed the Partial Concatenated Coding (PCC) technique as UEP(unequal error protection) code for efficient transmission of ATM cell in the air interface. We consider Doppler's effect, Rician fading, and diversity technique of maximal-ratio combining (MRC) for mobile channel model. For performance measure, we analyze bit error rate, ATM cell loss probability, ATM cell error probability, and network performances of ATM cell transmission delay and throughput. The numerical results show that the adoption of PCC is a prospective way for the evolution of future wireless ATM network on mobile environment.

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Cell Buffer Analysis for ATM-to-Frame Relay Interworking (ATM-프레임 릴레이 망 연동장치의 셀 수신 버퍼 용량 분석)

  • Lee, Sung-Chang;Nam, Yoon-Seok;Kim, Jeong-Sik
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.36S no.10
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    • pp.30-39
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    • 1999
  • In this paper, the size of IWU frame cell buffer is analyzed that receives FR frame cells from other FR networks through ATM backbone network. The frame cell buffer receives multiplexed ATM cells from other IWUs that provide interworking with ATM network for other FR networks A receiving IWU reassembles frames from multiplexed ATM cells by identifying the VPI/VCIs. The reassembled frames are transmitted on FR network links according to their destination. Therefore, IWU needs sufficient amount of buffers for the assembly of the frames and for providing the assembled frames with the queue to wait until the frame is transmitted by FR network link. In this paper, the probability of frame loss at the frame cell buffer is derived in terms of traffic parameters, the number of multiplexed FR connections, the number of FR links and the transmission capacity. By applying the derived results, we analyzed the required buffer size for a given probability of frame loss. Also, it is presented that how the probability and the required size are effected by the number of multiplexed FR connections and FR transmission links.

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A Study on the Control of Multi-class Traffics in ATM Networks (ATM 망에서 멀티클래스 트래픽 제어에 관한 연구)

  • 이기학;김점구
    • The Journal of Information Technology
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    • v.1 no.2
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    • pp.65-79
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    • 1998
  • In this thesis, a buffer alloction and management algorithm is proposed in order to satisfy the QoS of CBR/VBR traffics incomming to ATM networks. Proposed traffic menagement algorithm is based on the route seperation mechanism that allocates buffers acoording to traffic characterics, and sets threshold to allocated buffers. We developed a cell scheduling algorithm and evaluated cell delay and loss probability characteristics according to incomming traffic classes. The cell scheduling algorithm uses buffer size thresholds to control overload traffic flow.

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Development of an ATM switch simulator (ATM 스위치 시뮬레이터의 개발)

  • 변성혁;김덕경;이승준;허정원;선단근;박홍식
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.9
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    • pp.1209-1218
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    • 1995
  • In this paper, we develope an ATM switch simulator in order to evaluate the HAN/B-ISDN ATM switch currently being developed by ETRI. It models the basic cell switching functions of the target ATM switch with priority control and multicasting features and it also supports such various traffic models as random or bursty traffic, balanced or unbalanced traffic, multicast traffic models. Using this simulator, we can evaluate the performances of the ATM switch in terms of various performance indices, i.e. cell delay, cell loss probability, etc., and this simulator can be utilized in the system parameter tunings such as the common buffer size and address buffer size.

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An ABR flow control algorithm considering propagation delay (ATM 망에서 전파 지연을 고려한 ABR 흐름 제어)

  • 박기현;김승천;김동연;이재용;이상배
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.35S no.5
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    • pp.17-26
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    • 1998
  • B-ISDN has many advantages to provide multimedia, image transfer, etc. Recently, ABR service has been proposed in order to satisfy user's various requirements in it. In this paper, we propose a new ABR flow control algorithm called CAPRO. This algorithm uses the buffer proportional to propagation delay and controls the traffic on a link-by-link basis in order to minimize the effect of propagation delay. In order to use buffer more efficienctly, we define the request cell and the control cell. Then, we analyze our algorithm using mathematical model, simulate it using SLAM system, and compare to the existing EPRCA. As a result, our algorithm has the benifit of the throughput, cell loss probability, and fairness.

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