• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.11a
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• pp.3-6
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• 2003

This paper describes the interface stability of Ta-Mo alloy metal on $SiO_2$ Alloy was formed by co-sputtering method, and the alloy composition was varied by controlling Ta and Mo sputtering power. When the atomic composition of Ta was about 91%, the measured work function was 4.2eV that is suitable for NMOS gate. To identify interface stability between Ta-Mo alloy metal and $SiO_2$, C-V, FE-SEM(Field Emission-SEM), and XRD(X-ray diffraction) were performed on the samples annealed with rapid thermal processor between $600^{\circ}C$ and $900^{\circ}C$. Even after $900^{\circ}C$ rapid thermal annealing, excellent interface stability and electrical properties were observed. Also, thermodynamic analysis was studied to compare with experimental results.

• Journal of the Korean Society for Heat Treatment
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• v.16 no.5
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• pp.260-266
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• 2003

In order to study the interfacial reaction between Nb thin sheet and Fe-C-(Si) alloy with different Chemical compositions, they were cast-bonded. The growth of carbide layer formed at the interface after isothermal heat treatment at 1173K, 1223K, 1273K and 1323K for various times was investigated. The carbide formed at the interface was NbC and the thickness of NbC layer was increased linearly in proportional to the heat treating time. Therefore, It was found that the growth of NbC layer was controlled by the interfacial reaction. The growth rate constant of NbC layer was slightly increased with increase of carbon content when the silicon content is similar in the cast irons. However, as silicon content increases with no great difference in carbon content, the growth of NbC layer was greatly retarded. The calculated activation energy for the growth of NbC layer was varied in the range of 447.4~549.3 kJ/moI with the compositions of cast irons.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.26-26
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• 2000

High quality epitaxial Y2O3 thin films were prepared on Si(111) and (001) substaretes by using ion beam assisted deposition. As a substrate, clean and chemically oxidized Si wafers were used and the effects of surface state on the film crystallinity were investigated. The crystalline quality of the films were estimated by x-ray scattering, rutherford backscattering spectroscopy/channeling, and high-resolution transmission electron microscopy (HRTEM). The interaction between Y and Si atoms interfere the nucleation of Y2O3 at the initial growth stage, it could be suppressed by the interface SiO2 layer. Therefore, SiO2 layer of the 4-6 layers, which have been known for hindering the crystal growth, could rather enhance the nucleation of the Y2O3 , and the high quality epitaxial film could be grown successfully. Electrical properties of Y2O3 films on Si(001) were measured by C-V and I-V, which revealed that the oxide trap charge density of the film was 1.8$\times$10-8C/$\textrm{cm}^2$ and the breakdown field strength was about 10MV/cm.

• 한국신재생에너지학회:학술대회논문집
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• 2009.06a
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• pp.92-92
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• 2009

실리콘 기판과 비정질 실리콘 박막 사이의 계면특성은 실리콘 이종접합 태양전지의 효율을 높이는데 있어서 중요한 요소이다. 이종접합 태양전지에서는 n형 실리콘 기판 위에 비정질 실리콘 막을 증착시키는데 이 때 비정질 실리콘 막이 증착되면서 (111)면과 (111)면이 만나는 조직화된 피라미드의 골 사이에서 부분적으로 실리콘의 에피층이 성장하게 된다. 이 에피층이 결정질 실리콘 기판과 비정질 실리콘 막 사이의 계면 특성을 떨어뜨려 이종접합 태양전지의 효율이 감소하게 된다. 본 연구에서는 n형 실리콘 기판을 이용한 고효율 실리콘 이종접합 태양전지 제작을 위하여 실리콘 기판의 조직화 상태를 다르게 하여 셀을 제작하였다. 이에 큰 피라미드 형상의 조직화된 기판 표면, 작은 피라미드 형상의 조직화된 기판 표면, 큰 피라미드 형상을 라운딩 시킨 기판 표면, 작은 피라미드 형상을 라운딩 시킨 기판 표면을 제작하여 기판 종류에 따른 이종접합 태양전지를 제작하여 특성을 비교 하였다.

• Electrical & Electronic Materials
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• v.10 no.10
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• pp.1029-1033
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• 1997

A prototype MFSFET using ferroelectric fluoride BaMgF$_4$as a gate insulator has been successfully fabricated with the help of 2 sheets of metal mask. The fluoride film was deposited in an ultrai-high vacuum system at a substrate temperature of below 30$0^{\circ}C$ and an in-situ post-deposition annealing was conducted for 20 seconds at $650^{\circ}C$ in the same chamber. The interface state density of the BaMgF$_4$/Si(100) interface calculated by a MFS capacitor fabricated on the same wafer was about 8$\times$10$^{10}$ /cm$^2$.eV. The I$_{D}$-V$_{G}$ characteristics of the MFSFET show a hysteresis loop due to the ferroelectric nature of the BaMgF$_4$film. It is also demonstrated that the I$_{D}$ can be controlled by the “write” plus which was applied before the measurements even at the same “read”gate voltage.ltage.

• Korean Journal of Metals and Materials
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• v.48 no.8
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• pp.749-756
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• 2010

Low carbon steels were oxidized isothermally at 1050 and $1180^{\circ}C$ for 4 hr in air in order to determine the effect of alloying elements Si, S, Cu, Sn, and Ni on oxidation. For oxidation resistance of low carbon steels, the beneficial elements were Si, Cu, and Ni, whereas the harmful elements were S and Sn. The most active alloying element, Si, was scattered inside the oxide scale, at the scale-alloy interface, and as an internal oxide precipitate. The relatively noble elements such as Cu and Ni tended to weakly segregate at the scale-alloy interface. Sulfur and Sn were weakly, uniformly distributed inside the oxide scale. Excessively thick, non-adherent scales containing interconnected pores formed at $1180^{\circ}C$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.288-291
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• 2002

Application of metal silicides such as TiSi$_2$ and CoSi$_2$ as contacts and gate electrodes are being studied. However, TiSi$_2$ due to the linewidth-dependance, and CoSi$_2$ due to the excessive Si consumption during silicidation cannot be applied to the deep-submicron MOSFET device. NiSi shows no such problems and can be formed at the low temperature. But, NiSi shows thermal instability. In this investigation, NiSi was formed with a Ti-capping layer to improve the thermal stability. Ni and Ti films were deposited by the thermal evaporator. The samples were then annealed in the N$_2$ ambient at 300-800$^{\circ}C$ in a RTA (rapid thermal annealing) system. Four point probe, FESEM, and AES were used to study the thermal properties of Ti-capped NiSi layers. The Ti-capped NiSi was stable up to 700$^{\circ}C$ for 100 sec. RTA, while the uncapped NiSi layers showed high sheet resistance after 600$^{\circ}C$. The AES results revealed that the Ni diffusion further into the Si substrate was retarded by the capping layer, resulting in the suppression of agglomeration of NiSi films.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.354-357
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• 2002

Thermally grown gate oxide on 4H-SiC wafer was investigated. The oxide layers were grown at l150$^{\circ}C$ varying the carrier gas and post activation annealing conditions. Capacitance-Voltage(C-V) characteristic curves were obtained and compared using various gate electrode such as Al, Ni and poly-Si. The interface trap density can be reduced by using post oxidation annealing process in Ar atmosphere. All of the samples which were not performed a post oxidation annealing process show negative oxide effective charge. The negative oxide effective charges may come from oxygen radical. After the post oxidation annealing, the oxygen radicals fixed and the effective oxide charge become positive. The effective oxide charge is negative even in the annealed sample when we use poly silicon gate. Poly silicon layer was dope by POCl$_3$ process. The oxide layer may be affected by P ions in poly silicon layer due to the high temperature of the POCl$_3$ doping process.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.11 no.1
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• pp.38-42
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• 2001

Electric and dielectric(Ba,Sr)$TiO_3$[BST] thin films for emtal-Insulator-Semiconductor(MIS) capacitors have been studied. BST thin films wre deposted on p-Si(100) substrates bythe RF magnetron sputtering with tempratue range of 500~$600^{\circ}C$. The dielectric properties of MIS capacitors consisting of Al/BST/$SiO_2$/Si sandwich structure were evaluated ot redcue the leakage current density. The charge state densities of the MIS capacitors were determined by high frequency (1 MHz) C-V measurement. In order to reduce the leakage current in MIS capacitor, high quality $SiO_2$ layer was deposited on bare p-Si substrate. Depending on the oxygen pressure and substrate temperature both positive and negative polarities of effective oxide charge in the MIS capacitors were evaluated. It is considered that the density of electronic states, generated at the BST/$SiO_2$/p-Si interface due to the asymmetric structure within BST/$SiO_2$/Si structure, and the oxygen vacancy content has influence on the behavior of oxide charge.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.9
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• pp.672-675
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• 1999

Si-to-Si electrostatic bonding was carried out by employing LSG interlayer instead of conventional Corning #7740 interlayer in order to improve bonding properties. The surface roughness and dielectric breakdown field of the LSG interlayers deposited on Si substrates were investigated. Also, the bonding interface, bonding strength and bonding mechanism were discussed for the electrostatically-bonded Si-Si wafer pairs having LSG interlayers.