• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2000년도 Proceedings of 5th International Joint Symposium on Microeletronics and Packaging
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• pp.57-64
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• 2000

As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology fur their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electrodes nickel, solder jetting, stud bumping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.

• 마이크로전자및패키징학회지
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• 제7권1호
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• pp.51-59
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• 2000

As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology for their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electroless nickel, solder jetting, stud humping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. Research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.

• 제어로봇시스템학회논문지
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• 제19권11호
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• pp.960-967
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• 2013

Shape recognition of solder ball bumps in a BGA (Ball Grid Array) is an important issue in flip chip bonding technology. In particular, the semiconductor industry has required faster and more accurate inspection of micron-size solder bumps in flip chip bonding as the density of balls has increased dramatically. The difficulty of this issue comes from specular reflection on the metal ball. Shape recognition of a metal ball is a very realproblem for computer vision systems. Specular reflection of the metal ball appears, disappears, or changes its image abruptly due to tiny movementson behalf of the viewer. This paper presents a practical shape recognition method for three dimensional (3-D) inspection of a BGA using a 5-step ring illumination device. When the ring light illuminates the balls, distinctive specularity images of the balls, which are referred to as "iso-slope contours" in this paper, are shown. By using a mathematical reflectance model, we can drive the 3-D shape information of the ball in aquantitative manner. The experimental results show the usefulness of the method for industrial application in terms of time and accuracy.

• 한국전기전자재료학회논문지
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• 제22권3호
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• pp.199-204
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• 2009

The effect of temperature on ACF thermocompression bonding for FPD assembly was investigated, It was found that Au bumps on driver IC's were not bonded to the glass substrate when the bonding temperature was below $140^{\circ}C$ so bonds were made at temperatures of $163^{\circ}C$, $178^{\circ}C$ and $199^{\circ}C$ for further testing. The bonding time and pressure were constant to 3 sec and 3.038 MPa. To test bond reliability, FPD assemblies were subjected to thermal shock storage tests ($-30^{\circ}C$, $1\;Hr\;{\leftrightarrow}80^{\circ}C$, 1 Hr, 10 Cycles) and func! tionality was verified by driver testing. It was found all of FPDs were functional after the thermal cycling. Additionally, Au bumps were bonded using ACF's with higher conductive particle densities at bonding temperatures above $163^{\circ}C$. From the experimental results, when the bonding temperature was increased from $163^{\circ}C$ to $199^{\circ}C$, the curing time could be reduced and more conductive particles were retained at the bonding interface between the Au bump and glass substrate.

• 한국생산제조학회지
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• 제21권3호
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• pp.408-414
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• 2012

Screen printing is a printing method that uses a woven mesh to support an ink-blocking stencil by transferring ink or other printable materials in order to form an image onto a substrate. Recently, the screen printing method has applied to micro-electronic packaging by using solder paste as a printable material. For the screen printing of solder paste, metal masks containing a number of micro-holes are used as a stencil material. The metal mask undergoes deformation when it is installed in the screen printing machine, which results in the deformation of micro-holes. In the present study, finite element (FE) analysis was performed to predict the amount of deformation of a metal mask. For an efficient calculation of the micro-holes of the metal mask, the sub-domain analysis method was applied to perform FE analyses connecting the global domain (the metal mask) and the local domain (micro-holes). The FE analyses were then performed to evaluate the effects of slot designs on the deformation characteristics, from which more uniform and adjustable deformation of the metal mask can be obtained.

• 센서학회지
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• 제10권5호
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• pp.337-342
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• 2001

1차원 또는 2차원 배열을 갖는 적외선 센서는 흔히 Si CMOS 신호 처리 회로에 인듐 범프를 이용하여 접합된다. 이러한 방식을 취함으로 해서 적외선의 감지와 신호 처리가 초점면에서 이루어지게 되어 신호의 잡음을 크게 줄일 수 있고 적외선 검출기 자체도 훨씬 작게 만들 수 있다. 본 논문에서는 적외선 센서와 신호 처리 회로를 서로 자동으로 평행이 되도록 하면서 인듐범프 접합을 하는 방법을 연구하였다. 이에 의해서 개발된 플립 칩 본더는 구조가 간단하면서도 칩 간의 평행을 유지할 수 있고 작동 방법 또한 간단하여 접합의 신뢰성을 향상시킬 것으로 기대된다.

• 한국생산제조학회지
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• 제21권1호
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• pp.26-32
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• 2012

In the present study, the stencil printing process using solder paste are numerically analyzed. The key design parameters in the stencil printing process are the printing conditions, stencil design, and solder paste properties. Among these parameters, the effects of printing conditions including the squeegee angle and squeegee pressure are investigated through finite element (FE) analysis. However, the FE analysis for the stencil printing process requires tremendous computational loads and time because this process carries micro-filling through thousands of micro-apertures in stencil. To overcome this difficulty in simulation, the present study proposes a two-step approach to sequentially perform the global domain analysis and the local domain analysis. That is, the pressure development under the squeegee are firstly calculated in the full analysis domain through the global analysis. The filling stage of the solder paste into a micro-aperture is then analyzed in the local analysis domain based on the results of the preceding global analysis.

• ETRI Journal
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• 제35권4호
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• pp.625-631
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• 2013

For the formation of solder bumps with a fine pitch of 130 ${\mu}m$ on a printed circuit board substrate, low-volume solder on pad (LVSoP) technology using a maskless method is developed for SAC305 solder with a high melting temperature of $220^{\circ}C$. The solder bump maker (SBM) paste and its process are quantitatively optimized to obtain a uniform solder bump height, which is almost equal to the height of the solder resist. For an understanding of chemorheological phenomena of SBM paste, differential scanning calorimetry, viscosity measurement, and physical flowing of SBM paste are precisely characterized and observed during LVSoP processing. The average height of the solder bumps and their maximum and minimum values are 14.7 ${\mu}m$, 18.3 ${\mu}m$, and 12.0 ${\mu}m$, respectively. It is expected that maskless LVSoP technology can be effectively used for a fine-pitch interconnection of a Cu pillar in the semiconductor packaging field.

• 한국재료학회지
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• 제18권3호
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• pp.117-122
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• 2008

Micro-sized bumps on a multi-layered build-up PCB were fabricated by pulse-reverse copper electroplating. The values of the current density and brightener content for the electroplating were optimized for suitable performance with maximum efficiency. The micro-bumps thus electroplated were characterized using a range of analytical tools that included an optical microscope, a scanning electron microscope, an atomic force microscope and a hydraulic bulge tester. The optical microscope and scanning electron microscope analyses results showed that the uniformity of the electroplating was viable in the current density range of $2-4\;A/dm^2$; however, the uniformity was slightly degraded as the current density increased. To study the effect of the brightener concentration, the concentration was varied from zero to 1.2 ml/L. The optimum concentration for micro-bump electroplating was found to be 0.6 ml/L based on an examination of the electroplating properties, including the roughness, yield strength and grain size.

• 한국지능시스템학회논문지
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• 제22권6호
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• pp.694-699
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• 2012

반도체 검사 공정에 적용하기 위한 대시야 백색광간섭계(WSI ; White Light Scanning Interferometer)를 사용한 반도체 검사 결과를 본 논문에서 제시한다. 각 서브스트레이트에 있는 동일한 여러 범프에 대한 3D 데이터 반복성 측정 실험 결과를 제시한다. 각 서브스트레이트의 모든 범프에 대한 3D 데이터 반복성 측정 실험 결과를 제시한다. 반도체 검사 공정에서 3D 데이터 검사를 고속으로 달성하기 위해 대시야 백색광간섭계를 사용한 반도체 검사는 매우 중요한 의미를 갖는다. 인라인 고속 3D 데이터 검사기 개발에 본 논문이 크게 기여할 수 있다.