• 한국전기전자재료학회논문지
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• 제21권1호
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• pp.23-28
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• 2008

In this paper, transient characteristics of the Punch Through Insulated Gate Bipolar Transistor (PT-IGBT) have been studied. On the contrary to Non-Punch Through Insulated Gate Bipolar Transistor(NPT-IGBT), it has a buffer layer and reduces switching power loss. It has a simple drive circuit controlled by the gate voltage of the MOSFET and low on-state resistance of the bipolar junction transistor. The transient characteristics of the PT-IGBT have been analyzed analytically. Excess minority carrier and charge distribution in active base region, the rate of anode voltage with time are expressed analytically by adding the influence of buffer layer. The experimental data is obtained from manufacturer. The theoretical predictions of the analysis have been compared with the experimental data obtained from the measurement of a device(600 V, 15 A) and show good agreement.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.4-4
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• 2010

Single-crystalline IGZO (Indium-Gallium-Zinc oxide) was fabricated on c-sapphire substrate. Single crystal ZnO was used as a buffer layer, and post-annealing was treated in $900^{\circ}C$ for crystallization of IGZO. Crystallized IGZO formed superlattice structure spontaneously induced to c-axis direction by ZnO butTer layer, the composition of IGZO was varied by amount of ZnO. Crystallinity and composition of IGZO was analyzed by X-ray Diffraction and Transmission Electron Microscopy.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.379-379
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• 2010

$Hg_{1_x}Cd_xTe$ (MCT) was grown by hot wall epitaxy. Prior to the MCT growth, the CdTe (111) buffer layer was grown on the GaAs substrate at the temperature of $590^{\circ}C$ for 15 min. When the thickness of the CdTe buffer layer was $5\;{\mu}m$ or thicker, the full width at half maximum values obtained from the x-ray rocking curves were found to significantly decrease. After a good quality CdTe buffer layer was grown, the MCT epilayers were grown on the CdTe (111) /GaAs substrate at various temperatures in situ. The crystal quality for those epilayers was investigated by means of the x-ray rocking curves and the photocurrent experiment. The photoconductor characterization for the epilayers was also measured. The energy band gap of MCT was determined from the photocurrent measurement and the x composition rates from the temperature dependence of the energy band gap were turned out.

• 한국전기전자재료학회논문지
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• 제23권4호
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• pp.343-346
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• 2010

We have investigated growth of CdTe thin films by using (As, GaAs) buffer layers for application of large scale IR focal plane arrays(IFPAs). Buffer layers were grown by molecular beam epitaxy(MBE), which reduced the lattice mismatch of CdTe/Si and prevented native oxide on Si substrates. CdTe thin films were grown by metal organic chemical deposition system(MOCVD). As a result, polycrystalline CdTe films were grown on Si(100) and arsenic coated-Si(100) substrate. In other case, single crystalline CdTe(400) thin film was grown on GaAs coated-Si(100) substrate. Moreover, we observed hillock structure and mirror like surface on the (400) orientated epitaxial CdTe thin film.

• 한국전기전자재료학회논문지
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• 제16권10호
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• pp.865-870
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• 2003

The MFIS (Metal-Ferroelectric-Insulator-Semiconductor) capacitors were fabricated using a metalorganic decomposition method. Thin layers of CeO$_2$ were deposited as a buffer layer on Si substrate and BLT thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated. X -ray diffraction was used to determine the phase of the BLT thin films and the quality of the CeO$_2$ layer. The morphology of films and the interface structures of the BLT and the CeO$_2$ layers were investigated by scanning electron microscopy. The width of the memory window in the C-V curves for the MFIS structure is 2.82 V. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.206-206
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• 2011

투명 전도성 산화물 (TCO, Transparent Conductive Oxide) 박막을 태양전지에 적용하기 위해서는 우수한 전기 전도성 및 가시광 영역에서 높은 투과율을 가져야 한다. 대표적인 TCO 물질인 ITO (Indium tin oxide) 박막은 우수한 전기적, 광학적 특성을 가지고 있지만 $400^{\circ}C$ 이상의 고온에서는 전기저항이 급격히 증가하게 되어 실제 태양전지 패널에 적용했을 때 전기적 특성이 저하된다. 따라서 태양전지용 TCO 박막을 개발 시, 뛰어난 고온 안정성이 요구되고 있다. 본 연구에서는 고온 안정적 특성을 지니는 Ga3+를 도핑한 ZnO 계열 TCO인 GZO/ITO multi-layered 박막을 증착하였다. 또한 buffer layer의 두께 변화 및 구조 제어를 통한 최위층 박막의 전기적 특성 및 결정성을 조사하였으며 다층 박막의 계면 간 특성 및 굴절률 제어를 통한 광학적 물성을 연구하였다.

• 한국전기전자재료학회논문지
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• 제30권8호
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• pp.491-495
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• 2017

We investigated solution-processed indium-zinc oxide (IZO) thin-film transistors (TFTs) by inserting a 2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole (PBD) buffer layer. This buffer layer efficiently tuned the energy level between the semiconducting oxide channel and metal electrode by increasing charge extraction, thereby enhancing the overall device performance: the IZO TFT with embedded PBD layer (thickness: 5 nm; width: $2,000{\mu}m$; length: $200{\mu}m$) exhibited a field-effect mobility of $1.31cm^2V^{-1}s^{-1}$, threshold voltage of 0.12 V, subthreshold swing of $0.87V\;decade^{-1}$, and on/off current ratio of $9.28{\times}10^5$.

• 센서학회지
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• 제22권5호
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• pp.374-378
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• 2013

In this paper, a new structure of probe unit is designed and fabricated with PDMS, which is well-known elastic material, as a buffer layer for increasing overdrive force and mechanical strength. In general, PDMS is widely used as actuation material due to its elasticity and compatibility of fabrication process. In this work, PDMS layer is chosen for mechanical elasticity of the proposed probe unit. We achieved the high overdrive force by placing PDMS buffer layer under the silicon based cantilever due to its elasticity. Moreover, the relation between prove length and overdrive force was measured by experiment in this work. Therefore, the various specifications of the micro prove unit can be designed by using the results of this work.

• 한국전기전자재료학회논문지
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• 제13권2호
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• pp.125-130
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• 2000

Two step growth of reduced pressure chemical vapor eposition has been successfully developed to achieve in-situ phosphorus-doped silicon epilayers, and the characteristic evolution on their microstructures has been investigated using scanning electron microscopy, transmission electron microscopy, and secondary ion mass spectroscopy. The two step growth, which employs heavily in-situ P doped silicon buffer layer grown at low temperature, proposes crucial advantages in manipulating crystal structures of in-situ phosphorus doped silicon. In particular, our experimental results showed that with annealing of the heavily P doped silicon buffer layers, high-quality epitaxial silicon layers grew on it. the heavily doped phosphorus in buffer layers introduces into native oxide and plays an important role in promoting the dispersion of native oxides. Furthermore, the phosphorus doping concentration remains uniform depth distribution in high quality single crystalline Si films obtained by the two step growth.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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• pp.68-69
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• 2007

We have prepared p-type ZnO:Al films in pure oxygen ambient on n-type Si (100) and homo buffer layers by RF magnetron sputtering system. Hall effect measurement shows that the film annealed at $600^{\circ}C$ possesses p-type conductivity and the film annealed $800^{\circ}C$ does not. PL spectra show different properties of p- and n-type ZnO film. The corresponding peaks of PL spectra of p- and n-type show at about same positions. The intensities of high photon energy of n-type film on buffer shows decreasing tendency.