• Journal of the Korean earth science society
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• v.21 no.5
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• pp.541-552
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• 2000

The variations of physical properties due to inflow of seawater by sluice gates operation were observed in Shihwa Lake. The distributions of salinity and temperature were investigated at 11 stations during February, 1997 to July, 1998. The salinity of water mass in Shihwa Lake before gate operation was ranged below 15psu and strong stratification due to inflow of seawater was observed at the depth of 11 m. In July 1997, temperature difference of 10^{\circ}C$ was occurred between the surface and bottom water due to strong solar radiation. During October 1997 to February 1998, inversion of temperature distribution, which the temperature of bottom water was higher than that of surface water, was observed. In July 1997, temperature, salinity, current speed and current direction were investigated by RCM-7 at St.3 for 56 days. When sea water was intruded in Shihwa Lake, the symmetric distribution of temperature and salinity was observed and it seems to be resulted from inflow of seawater with low temperature and high salinity. After January 1998, salinity of Shihwa Lake was increased over 30psu due to continuous gate operation and the stratification was weakened.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.5
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• pp.427-431
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• 2020

In this research, we evaluated the electrical properties of polycrystalline-gallium-oxIde (Ga₂O₃) thin films grown by mist-CVD. A 500~800 nm-thick Ga₂O₃ film was used as a channel in a fabricated bottom-gate MOSFET device. The phase stability of the β-phase Ga₂O₃ layer was enhanced by an annealing treatment. A Ti/Al metal stack served as source and drain electrodes. Maximum drain current (I_D) exceeded 1 mA at a drain voltage (V_D) of 20 V. Electron mobility of the β-Ga₂O₃ channel was determined from maximum transconductance (g_m), as approximately, 1.39 ㎠/Vs. Reasonable device characteristics were demonstrated, from measurement of drain current-gate voltage, for mist-CVD-grown Ga₂O₃ thin films.

• Journal of the Korean Society of Safety
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• v.32 no.6
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• pp.61-67
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• 2017

Suspended sediment transport plays principal roles in morphological process of natural coastals. It is needed to understand the reason why interaction characteristics of solitary wave and suspended sediment. The present study shows that suspended sediment pickup derived on solitary wave celerity. The 2D prismatic open channel length is 12 m, width is 0.8 m, height is 0.75 m and slope is 1/6. Generation of solitary wave is used by rapidly opening the sluice gate. Bottom surface sediments are laid movable slope section by 0.03 m thickness and experimental sediments are used anathracite and jumoonjin sand. Techniques of suspended sediment pickup rate are designed equipment ASC(Absorptive Suspended sediment Collector). It could directly absorb 5 points suspended sediment by channel water depth. Solitary wave celerity is measued by ADV(Acoustic Doppler Velocimeter). Mounted two video cameras(Model No. : Sony, HDR-XR550) are used to image processing of suspended sediment concentration and turbidity. Suspended sediment pikcup rate(Einstein, 1950) is analyzed to nondimensionalization based on solitary wave celerity. The suspended sediment pickup rate is suggested that more effective plunging breaking type than spilling. The results indicates fundamental suspended sediment transport mechanism between solitary wave celerity and suspended sediment pickup based on laboratory experiments. Finally, the present study suggests that suspended sediment pickup rate by solitary wave is used only characteristics of sediment and solitary wave celerity.

• Journal of Sensor Science and Technology
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• v.7 no.5
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• pp.364-371
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• 1998

A novel antifuse has been developed for field programmable gate arrays (FPGA's) as a voltage programmable link with Al/$BaTiO_3/SiO_2$/TiW-silicide. The proper program voltage can be obtained by adjusting the deposition thickness of $BaTiO_3$ film. When a negative voltage was applied at bottom TiW-silicide electrode of the antifuse, based on $BaTiO_3(120{\AA})$/$SiO_2(120{\AA})$, the program voltage was about l4.4V and on-resistances were ranged between 40 and $50{\Omega}$. The current-voltage characteristics of antifuses are consistent with a Frenkel-Poole conduction model. However, there are some deviations depending on bias polarity that are probably due to the difference in the interface properties between Al/$BaTiO_3$ and TiW-silicide/$SiO_2$.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1199-1202
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• 2008

High mobility bottom gate thin film transistors (TFTs) with an amorphous gallium tin zinc oxide (a-GSZO) channel layer have been produced by rf magnetron cosputtering using a gallium zinc oxide (GZO) and tin (Sn) targets. The effect of the post annealing temperatures ($200^{\circ}C$, $250^{\circ}C$ and $300^{\circ}C$) was evaluated and compared with two series of TFTs produced at room temperature and $150^{\circ}C$ during the channel deposition. From the results it was observed that the effect of pos annealing is crucial for both series of TFTs either for stability as well as for improving the electrical characteristics. The a-GSZO TFTs operate in the enhancement mode (n-type), present a high saturation mobility of $24.6\;cm^2/Vs$, a subthreshold gate swing voltage of 0.38 V/decade, a turn-on voltage of -0.5 V, a threshold voltage of 4.6 V and an $I_{ON}/I_{OFF}$ ratio of $8{\times}10^7$, satisfying all the requirements to be used in active-matrix backplane.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.620-621
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• 2008

Transparent electronics has been one of the key terminologies forecasting the ubiquitous technology era. Several researchers have thus extensively developed transparent oxide-based thin-film transistors (TFTs) on glass and plastic substrates although in general high voltage operating devices have been mainly studied considering transparent display drivers. However, low voltage operating oxide TFTs with transparent electrodes are very necessary if we are aiming at logic circuit applications, for which transparent complementary or one-type channel inverters are required. The most effective and low power consuming inverter should be a form of complementary p-channel and n-channel transistors but real application of those complementary TFT inverters also requires electrical- and even photo-stabilities. Since p-type oxide TFTs have not been developed yet, we previously adopted organic pentacene TFTs for the p-channel while ZnO TFTs were chosen for n-channel on sputter-deposited $AlO_x$ film. As a result, decent inverting behavior was achieved but some electrical gate instability was unavoidable at the ZnO/$AlO_x$ channel interface. Here, considering such gate instability issues we have designed a unique transparent complementary TFT (CTFTs) inverter structure with top n-ZnO channel and bottom p-pentacene channel based on 12 nm-thin nano-oxide/self assembled monolayer laminated dielectric, which has a large dielectric strength comparable to that of thin film amorphous $Al_2O_3$. Our transparent CTFT inverter well operate under 3 V, demonstrating a maximum voltage gain of ~20, good electrical and even photoelectric stabilities. The device transmittance was over 60 % and this type of transparent inverter has never been reported, to the best of our limited knowledge.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.12 no.2
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• pp.22-29
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• 2013

The platform safety door is difficult to install in platform because the doors of railway vehicles and existing Passenger Safety doors should be alined. To be able to solve this problem, we propose the use of Rope Type Platform Safe Door (RPSD) which is a vertically retractable platform that is designed to close from top to bottom. This platform has installed safety gate pillars at intervals of 20-40 m which accommodates different types of train regardless of train length, gate opening and location. In this paper, we reviewed the application of existing PSD and RPSD in various train stops in Seoul Gyeongbu Line platform. The results of the review showed that the existing PSD may cause problem in construction, safety and cost efficiency. The use of RPSD however shows that minimal problems will be encountered.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.304.1-304.1
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• 2014

Flat-panel displays have been growing as an essential everyday product in the current information/communication ages in the unprecedented speed. The forward-coming applications require light-weightness, higher speed, higher resolution, and lower power consumption, along with the relevant cost. Such specifications demand for a new concept-based materials and applications, unlike Si-based technologies, such as amorphous Si and polycrystalline Si thin film transistors. Since the introduction of the first concept on the oxide-based thin film transistors by Hosono et al., amorphous oxide thin film transistors have been gaining academic/industrial interest, owing to the facile synthesis and reproducible processing despite of a couple of shortcomings. The current work places its main emphasis on the binary oxides composed of ZnO and SnO2. RF sputtering was applied to the fabrication of amorphous oxide thin film devices, in the form of bottom-gated structures involving highly-doped Si wafers as gate materials and thermal oxide (SiO2) as gate dielectrics. The physical/chemical features were characterized using atomic force microscopy for surface morphology, spectroscopic ellipsometry for optical parameters, X-ray diffraction for crystallinity, and X-ray photoelectron spectroscopy for identification of chemical states. The combined characterizations on Zn-Sn-O thin films are discussed in comparison with the device performance based on thin film transistors involving Zn-Sn-O thin films as channel materials, with the aim to optimizing high-performance thin film transistors.

• Journal of the Korean Society for Railway
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• v.10 no.1 s.38
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• pp.57-66
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• 2007

1974. 8. 15 SeoulMetro, beginning with the first electric railway established at six cities, so it is managing mass transportation of traffic. Especially, in case of seoul, It is managing that from one to eight lines, 286.9km, 265 stations have installed and now it is carrying about 5.5million of passengers everyday, and 2,000million passengers a year. So accident is increasing from the station every year. For this measure, SeoulMetro prepares safety fence for passengers crash but, as suicides or people who watch the accident took place, for at the bottom of passengers crash protection, PSD installing is needed. Even though, PSD is managing ATO section but, in controlling SeoulMetro, one to four lines sections are (ATS, ATC)section. Between as ATS, ATC section, ATO section, subway gate and PSD must have opened and crossed always at the time. And the interlock control corrosion protection gate, managing skills with installation, method, using in history, apply to 10rail cars one train sets, and maximum applying 2224% sections of passengers congested that consideration is to be needed. So 2004, SeoulMetro improved technology and basie design of PSD at ATS section. Based on this, from 2005.4 to 2006.6, using subway 2lines per 12stations set the model installation(full type 11stations, half type 1station) After installing in case of success, it is going about to suggest that effective analysis and hereafter subject.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.10
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• pp.821-825
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• 2009

Recently, transparent ZnO-based TFTs have attracted much attention for flexible displays because they can be fabricated on plastic substrates at low temperature. We report the fabrication and characteristics of ZnO TFTs having different channel thicknesses deposited at low temperature. The ZnO films were deposited as active channel layer on $Si_3N_4/Ti/SiO_2/p-Si$ substrates by RF magnetron sputtering at $100^{\circ}C$ without additional annealing. Also, the ZnO thin films deposited at oxygen partial pressures of 40%. ZnO TFTs using a bottom-gate configuration were investigated. The $Si_3N_4$ film was deposited as gate insulator by PE-CVD at $150^{\circ}C$. All Processes were processed below $150^{\circ}C$ which is optimal temperature for flexible display and were used dry etching method. The fabricated devices have different threshold slop, field effect mobility and subthreshold slop according to channel thickness. This characteristics are related with ZnO crystal properties analyzed with XRD and SPM. Electrical characteristics of 60 nm ZnO TFT (W/L = $20\;{\mu}m/20\;{\mu}m$) exhibited a field-effect mobility of $0.26\;cm^2/Vs$, a threshold voltage of 8.3 V, a subthreshold slop of 2.2 V/decade, and a $I_{ON/OFF}$ ratio of $7.5\times10^2$.