• Korean Journal of Computational Design and Engineering
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• v.19 no.3
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• pp.214-223
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• 2014

This paper presents a bottleneck detection framework using simulation approach in a wafer FAB (Fabrication). In a semiconductor manufacturing industry, wafer FAB facility contains various equipment and dozens kinds of wafer products. The wafer FAB has many characteristics, such as re-entrant processing flow, batch tools. The performance of a complex manufacturing system (i.e. semiconductor wafer FAB) is mainly decided by a bottleneck. This paper defines the problem of a bottleneck process and propose a simulation based framework for bottleneck detection. The bottleneck is not the viewpoint of a machine, but the viewpoint of a step with the highest WIP in its upstream buffer and severe fluctuation. In this paper, focus on the classification of bottleneck steps and then verify the steps are not in a starvation state in last, regardless of dispatching rules. By the proposed framework of this paper, the performance of a wafer FAB is improved in on-time delivery and the mean of minimum of cycle time.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 1996.04a
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• pp.121-124
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• 1996

In general, cellular manufacturing system can be constructed by the following two steps. The first step forms machine cells and part families, and the second step determines cell layout based on the result of first step. Cell layout has to be considered when cell is formed becauese the result of cell formation affects it. This paper presents a cell formation algorithm and proposes an integrated mathematical model for cell formation and cell layout. The cell formation algorithm minimizes the number of exceptional element in cellular manufacturing system. New concept for similarity and incapability is introduced, based on machine-operation incidence matrix and part-operation incidence matrix. One is similarity between the machines, the other is similarity between preliminary machine cells and machines. The incapability identifies relations between machine cells and parts. In this procedure, only parts without an exceptional element are assigned to machine cell. Bottleneck parts are considered with cell layout design in an integrated mathematical model. The integrated mathematical model determines cell layout and assigns bottleneck parts to minimize the number of exceptional element and intercell moving distance, based on linearixed 0-1 integer programming. The proposed algorithm is illustrated by using numerical examples.

• Journal of KIISE:Databases
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• v.30 no.4
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• pp.381-396
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• 2003

Subsequence matching is an operation that finds subsequences whose changing patterns are similar to a given query sequence from time-series databases. This paper points out the performance bottleneck in subsequence matching, and then proposes an effective method that improves the performance of entire subsequence matching significantly by resolving the performance bottleneck. First, we analyze the disk access and CPU processing times required during the index searching and post processing steps through preliminary experiments. Based on their results, we show that the post processing step is the main performance bottleneck in subsequence matching, and them claim that its optimization is a crucial issue overlooked in previous approaches. In order to resolve the performance bottleneck, we propose a simple but quite effective method that processes the post processing step in the optimal way. By rearranging the order of candidate subsequences to be compared with a query sequence, our method completely eliminates the redundancy of disk accesses and CPU processing occurred in the post processing step. We formally prove that our method is optimal and also does not incur any false dismissal. We show the effectiveness of our method by extensive experiments. The results show that our method achieves significant speed-up in the post processing step 3.91 to 9.42 times when using a data set of real-world stock sequences and 4.97 to 5.61 times when using data sets of a large volume of synthetic sequences. Also, the results show that our method reduces the weight of the post processing step in entire subsequence matching from about 90% to less than 70%. This implies that our method successfully resolves th performance bottleneck in subsequence matching. As a result, our method provides excellent performance in entire subsequence matching. The experimental results reveal that it is 3.05 to 5.60 times faster when using a data set of real-world stock sequences and 3.68 to 4.21 times faster when using data sets of a large volume of synthetic sequences compared with the previous one.

• Asian-Australasian Journal of Animal Sciences
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• v.22 no.1
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• pp.1-6
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• 2009

Genetic variability is an important component in the ability of populations to adapt in the face of environmental change. Severe human impacts reduced Muzzafarnagri sheep of India from 500,000 in 1972 to 10,989 in 1973-74. Here we report for the first time the effect of this population decline on levels of genetic variability at 13 FAO recommended ovine microsatellite loci and contrast levels of variability to that in a breed from the same geographical region, which differed in numbers, by an order of magnitude (Marwari sheep). Of the 13 loci, 100% were polymorphic in both breeds. A high degree of genetic variation was observed within populations in terms of both allele diversity (number of alleles per locus, >4) and gene diversity (expected heterozygosity, >0.5), which implied that there is still a substantial amount of genetic diversity at the nuclear loci in a declining population. Nevertheless, overall low number of alleles per locus and relatively less abundance of low frequency alleles in Muzzafarnagri sheep suggested that genetic variability has been comparatively reduced in this population. Bottleneck analysis indicated that a genetic bottleneck did not occur during the most recent decline. In addition, we found that the differentiation among populations was moderate ($F_{ST}$= 11.8%). This study on assessment of genetic effects of the population declines in ovines is a step towards identification of genetically impoverished or healthy populations, which could prove to be a useful tool to facilitate conservation planning in this important species of small ruminants.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.5_6
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• pp.299-306
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• 2003

This paper formulates a problem of embedded real-time system re-engineering, and presents its solution approach. Embedded system re-engineering is defined as a development task of meeting performance requirements newly imposed on a system after its hardware and software have been fully implemented. The performance requirements nay include a real-time throughput and an input-to-output latency. The proposed solution approach is based on a bottleneck analysis and nonlinear optimization. The inputs to the approach include a system design specified with a process network and a set of task graphs, task allocation and scheduling, and a new real-time throughput requirement specified as a system's period constraint. The solution approach works in two steps. In the first step, it determines bottleneck precesses in the process network via estimation of process latencies. In the second step, it derives a system of constraints with performance scaling factors of processing elements being variables. It then solves the constraints for the performance staling factors with an objective of minimizing the total hardware cost of the resultant system. These scaling factors suggest the minimal cost hardware upgrade to meet the new performance requirement. Since this approach does not modify carefully designed software structures, it helps reduce the re-engineering cycle.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.4
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• pp.240-245
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• 2006

Viterbi decoder is composed of BMU(Branch metric Unit), ACSU(Add Compare Select Unit), and SMU(Survivor path Memory Unit). For high speed viterbi decoders, ACSU is the main bottleneck due to the compare-select and feedback operation. Thus, many studies have been advanced to solve the problem. For example, M-step look ahead technique and Minimized method are typical high speed algorithms. In this paper, we designed a bit-level ACSU(K=3, R=1/2, 4bit soft decision) based on those algorithms and switched the matrix product order in the backward direction of Minimized method so as to apply Code-Optimized-Array in order to reduce the area complexity. For experimentation, we synthesized our design by using SYNOPSYS Design compiler, with TSMC 0.18 um library, and verified the timing by using CADENCE verilog-XL.

• Journal of Microbiology and Biotechnology
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• v.25 no.6
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• pp.880-886
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• 2015

Bacterial heme was produced from a genetic-engineered Escherichia coli via the porphyrin pathway and it was useful as an iron resource for animal feed. The amount of the E. coli-synthesized heme, however, was only few milligrams in a culture broth and it was not enough for industrial applications. To analyze heme biosynthetic pathways, an engineered E. coli artificially overexpressing ALA synthase (hemA from Rhodobacter sphaeroides) and pantothenate kinase (coaA gene from self geneome) was constructed as a bacterial heme-producing strain, and both the transcription levels of pathway genes and the intermediates concentrations were determined from batch and continuous cultures. Transcription levels of the pathway genes were not significantly changed among the tested conditions. Intracellular intermediate concentrations indicated that aminolevulinic acid (ALA) and coenzyme A (CoA) were enhanced by the hemA-coaA co-expression. Intracellular coproporphyrinogen I and protoporphyrin IX accumulation suggested that the bottleneck steps in the heme biosynthetic pathway could be the spontaneous conversion of HMB to coproporphyrinogen I and the limited conversion of protoporphyrin IX to heme, respectively. A strategy to increase the conversion of ALA to heme is discussed based on the results.

• The KIPS Transactions:PartD
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• v.11D no.7 s.96
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• pp.1385-1398
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• 2004

This paper discusses an effective processing of subsequence matching under time warping in time-series databases. Time warping is a trans-formation that enables finding of sequences with similar patterns even when they are of different lengths. Through a preliminary experiment, we first point out that the performance bottleneck of Naive-Scan, a basic method for processing of subsequence matching under time warping, is on the CPU processing step. Then, we propose a novel method that optimizes the CPU processing step of Naive-Scan. The proposed method maximizes the CPU performance by eliminating all the redundant calculations occurring in computing the time warping distance between the query sequence and data subsequences. We formally prove the proposed method does not incur false dismissals and also is the optimal one for processing Naive-Scan. Also, we discuss the we discuss to apply the proposed method to the post-processing step of LB-Scan and ST-Filter, the previous methods for processing of subsequence matching under time warping. Then, we quantitatively verify the performance improvement ef-fects obtained by the proposed method via extensive experiments. The result shows that the performance of all the three previous methods im-proves by employing the proposed method. Especially, Naive-Scan, which is known to show the worst performance, performs much better than LB-Scan as well as ST-Filter in all cases when it employs the proposed method for CPU processing. This result is so meaningful in that the performance inversion among Nive- Scan, LB-Scan, and ST-Filter has occurred by optimizing the CPU processing step, which is their perform-ance bottleneck.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.8
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• pp.125-136
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• 2009

This paper presents a high-speed low-complexity two-bit level pipelined Viterbi decoder architecture for MB-OFDM UWB systems. As the add-compare-select unit (ACSU) is the main bottleneck of the Viterbi decoder, this paper proposes a novel two-bit level pipelined MSB-first ACSU, which is based on 2-step look-ahead techniques to reduce the critical path. The proposed ACSU architecture requires approximately 12% fewer gate counts and 9% faster speed than the conventional MSB-first ACSU. The proposed Viterbi decoder was implemented with $0.18-{\mu}m$ CMOS standard cell technology and a supply voltage of 1.8V. It operates at a clock frequency of 870 MHZ and has a throughput of 1.74 Gb/s.

• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.392-392
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• 2000

This study performs optimization of paper mill scheduling using MINLP(Mixed-Integer Non-Linear Programming) method and 2-step decomposing strategy. Paper mill process is normally composed of five units: paper machine, coater, rewinder, sheet cutter and roll wrapper/ream wrapper. Various kinds of papers are produced through these units. The bottleneck of this process is how to cut product papers efficiently from raw paper reel and this is called trim loss problem or cutting stock problem. As the trim must be burned or recycled through energy consumption, minimizing quantity of the trim is important. To minimize it, the trim loss problem is mathematically formulated in MINLP form of minimizing cutting patterns and trim as well as satisfying customer's elder. The MINLP form of the problem includes bilinearity causing non-linearity and non-convexity. Bilinearity is eliminated by parameterization of one variable and the MINLP form is decomposed to MILP(Mixed-Integer Linear programming) form. And the MILP problem is optimized by means of the optimization package. Thus trim loss problem is efficiently minimized by this 2-step optimization method.