• 제목/요약/키워드: bonding temperature

검색결과 1,060건 처리시간 0.032초

미세 피치를 갖는 bare-chip 공정 및 시스템 개발 (The Development of Fine Pitch Bare-chip Process and Bonding System)

  • 심형섭;강희석;정훈;조영준;김완수;강신일
    • 반도체디스플레이기술학회지
    • /
    • 제4권2호
    • /
    • pp.33-37
    • /
    • 2005
  • Bare-chip packaging becomes more popular along with the miniaturization of IT components. In this paper, we have studied flip-chip process, and developed automated bonding system. Among the several bonding method, NCP bonding is chosen and batch-type equipment is manufactured. The dual optics and vision system aligns the chip with the substrate. The bonding head equipped with temperature and force controllers bonds the chip. The system can be easily modified fer other bonding methods such as ACF.

  • PDF

TSV 를 이용한 3 차원 적층 패키지의 본딩 공정에 의한 휨 현상 및 응력 해석 (Warpage and Stress Simulation of Bonding Process-Induced Deformation for 3D Package Using TSV Technology)

  • 이행수;김경호;좌성훈
    • 한국정밀공학회지
    • /
    • 제29권5호
    • /
    • pp.563-571
    • /
    • 2012
  • In 3D integration package using TSV technology, bonding is the core technology for stacking and interconnecting the chips or wafers. During bonding process, however, warpage and high stress are introduced, and will lead to the misalignment problem between two chips being bonded and failure of the chips. In this paper, a finite element approach is used to predict the warpages and stresses during the bonding process. In particular, in-plane deformation which directly affects the bonding misalignment is closely analyzed. Three types of bonding technology, which are Sn-Ag solder bonding, Cu-Cu direct bonding and SiO2 direct bonding, are compared. Numerical analysis indicates that warpage and stress are accumulated and become larger for each bonding step. In-plane deformation is much larger than out-of-plane deformation during bonding process. Cu-Cu bonding shows the largest warpage, while SiO2 direct bonding shows the smallest warpage. For stress, Sn-Ag solder bonding shows the largest stress, while Cu-Cu bonding shows the smallest. The stress is mainly concentrated at the interface between the via hole and silicon chip or via hole and bonding area. Misalignment induced during Cu-Cu and Sn-Ag solder bonding is equal to or larger than the size of via diameter, therefore should be reduced by lowering bonding temperature and proper selection of package materials.

Interconnection Technology Based on InSn Solder for Flexible Display Applications

  • Choi, Kwang-Seong;Lee, Haksun;Bae, Hyun-Cheol;Eom, Yong-Sung;Lee, Jin Ho
    • ETRI Journal
    • /
    • 제37권2호
    • /
    • pp.387-394
    • /
    • 2015
  • A novel interconnection technology based on a 52InSn solder was developed for flexible display applications. The display industry is currently trying to develop a flexible display, and one of the crucial technologies for the implementation of a flexible display is to reduce the bonding process temperature to less than $150^{\circ}C$. InSn solder interconnection technology is proposed herein to reduce the electrical contact resistance and concurrently achieve a process temperature of less than $150^{\circ}C$. A solder bump maker (SBM) and fluxing underfill were developed for these purposes. SBM is a novel bumping material, and it is a mixture of a resin system and InSn solder powder. A maskless screen printing process was also developed using an SBM to reduce the cost of the bumping process. Fluxing underfill plays the role of a flux and an underfill concurrently to simplify the bonding process compared to a conventional flip-chip bonding using a capillary underfill material. Using an SBM and fluxing underfill, a $20{\mu}m$ pitch InSn solder SoP array on a glass substrate was successfully formed using a maskless screen printing process, and two glass substrates were bonded at $130^{\circ}C$.

갈륨 및 갈륨 합금을 이용한 저온접합 기술 동향 (Trends of Low-temperature Bonding Technologies using Gallium and Gallium Alloys)

  • 홍태영;심호률;손윤철
    • 마이크로전자및패키징학회지
    • /
    • 제29권2호
    • /
    • pp.11-18
    • /
    • 2022
  • 최근 세계적으로 유연 전자소자 관련 기술들이 주목을 받으면서 유연소자 제작 과정에서의 성형성 및 굽힘 상태에서의 성능과 내구성 등의 문제점을 개선하기 위하여 액체 금속을 사용한 배선·접합 기술들의 개발이 요구되고 있다. 이러한 요구에 부응하여 독성이 없으면서 낮은 점도와 우수한 전기전도도를 가지는 갈륨 및 갈륨계 합금 (공정 갈륨-인듐 및 공정 갈륨-인듐-주석 등)의 액체금속을 저온 접합소재로 이용하려는 다양한 연구들이 이루어지고 있다. 본 논문에서는 갈륨 및 갈륨계 합금을 이용한 저온접합 기술의 최신 연구동향을 정리하여 소개하고자 한다. 이러한 기술들은 향후 유연 전자소자의 제조 및 전자패키지에서의 저온접합 등의 분야에서 실용화를 위한 중요한 기반기술이 될 것으로 예상된다.

COG 본딩의 접합 특성에 관한 연구 (A Study on the Bonding Performance of COG Bonding Process)

  • 최영재;남성호;김경태;양근혁;이석우
    • 한국정밀공학회지
    • /
    • 제27권7호
    • /
    • pp.28-35
    • /
    • 2010
  • In the display industry, COG bonding method is being applied to production of LCD panels that are used for mobile phones and monitors, and is one of the mounting methods optimized to compete with the trend of ultra small, ultra thin and low cost of display. In COG bonding process, electrical characteristics such as contact resistance, insulation property, etc and mechanical characteristics such as bonding strength, etc depend on properties of conductive particles and epoxy resin along with ACF materials used for COG by manufacturers. As the properties of such materials have close relation to optimization of bonding conditions such as temperature, pressure, time, etc in COG bonding process, it is requested to carry out an in-depth study on characteristics of COG bonding, based on which development of bonding process equipment shall be processed. In this study were analyzed the characteristics of COG bonding process, performed the analysis and reliability evaluation on electrical and mechanical characteristics of COG bonding using ACF to find optimum bonding conditions for ACF, and performed the experiment on bonding characteristics regarding fine pitch to understand the affection on finer pitch in COG bonding. It was found that it is difficult to find optimum conditions because it is more difficult to perform alignment as the pitch becomes finer, but only if alignment has been made, it becomes similar to optimum conditions in general COG bonding regardless of pitch intervals.

3D 적층 IC를 위한 웨이퍼 레벨 본딩 기술 (Wafer Level Bonding Technology for 3D Stacked IC)

  • 조영학;김사라은경;김성동
    • 마이크로전자및패키징학회지
    • /
    • 제20권1호
    • /
    • pp.7-13
    • /
    • 2013
  • 3D 적층 IC 개발을 위한 본딩 기술의 현황에 대해 알아보았다. 실리콘 웨이퍼를 본딩하여 적층한 후 배선 공정을 진행하는 wafer direct bonding 기술보다는 배선 및 금속 범프를 먼저 형성한 후 금속 본딩을 통해 웨이퍼를 적층하는 공정이 주로 연구되고 있다. 일반적인 Cu 열압착 본딩 방식은 높은 온도와 압력을 필요로 하기 때문에 공정온도와 압력을 낮추기 위한 연구가 많이 진행되고 있으며, 그 가운데서 Ar 빔을 조사하여 표면을 활성화 시키는 SAB 방식과 실리콘 산화층과 Cu를 동시에 본딩하는 DBI 방식이 큰 주목을 받고 있다. 국내에서는 Cu 열압착 방식을 이용한 웨이퍼 레벨 적층 기술이 현재 개발 중에 있다.

14K 화이트-레드골드의 확산접합 공정에 따른 접합 물성 연구 (Bonding Properties of 14K White-Red Gold Alloy by Diffusion Bonding Process)

  • 송정호;송오성
    • 한국재료학회지
    • /
    • 제27권7호
    • /
    • pp.386-391
    • /
    • 2017
  • Using a customized diffusion bonder, we executed diffusion bonding for ring shaped white gold and red gold samples (inner, outer diameter, and thickness were 15.7, 18.7, and 3.0 mm, respectively) at a temperature of $780^{\circ}C$ and applied pressure of 2300 N in a vacuum of $5{\times}10^{-2}$ torr for 180 seconds. Optical microscopy, field emission scanning electron microscopy (FE-SEM), and energy-dispersive X-ray spectroscopy (EDS) were used to investigate the microstructure and compositional changes. The mechanical properties were confirmed by Vickers hardness and shear strength tests. Optical microscopy and FE-SEM confirmed the uniform bonding interface, which was without defects such as micro pores. EDS mapping analysis confirmed that each gold alloy was 14K with the intended composition; Ni and Cu was included as coloring metals in the white and red gold alloys, respectively. The effective diffusion coefficient was estimated based on EDS line scanning. Individual values of Ni and Cu were $5.0{\times}10^{-8}cm^2/s$ and $8.9{\times}10^{-8}cm^2/s$, respectively. These values were as large as those of the melting points due to the accelerated diffusion in this customized diffusion bonder. Vickers hardness results showed that the hardness values of white gold and red gold were 127.83 and 103.04, respectively, due to solid solution strengthening. In addition, the value at the interface indicated no formation of intermetallic compound around the bonding interface. From the shear strength test, the sample was found not to be destroyed at up to 100,000 gf due to the high bonding strength. Therefore, these results confirm the successful diffusion bonding of 14K white-red golds with a diffusion bonder at a low temperature of $780^{\circ}C$ and a short processing time of 180 seconds.

주석-니켈 마이크로 분말을 이용한 EV 전력모듈용 천이액상 소결 접합 (Transient Liquid Phase Sinter Bonding with Tin-Nickel Micro-sized Powders for EV Power Module Applications)

  • 윤정원;정소은
    • 마이크로전자및패키징학회지
    • /
    • 제28권2호
    • /
    • pp.71-79
    • /
    • 2021
  • 본 연구에서는 고온 대응 EV (Electric Vehicle) 전력반도체 칩 접합용 Sn-Ni 페이스트의 제조 및 특성 평가 연구가 수행되었다. Sn-Ni 페이스트의 Sn과 Ni 함량에 따른 TLPS (Transient Liquid Phase Sintering) 접합부 미세 조직 변화 관찰 결과, Sn-20Ni (in wt.%)의 경우에는 Ni 분말의 부족, 그리고 Sn-50Ni의 경우에는 Ni 분말의 과다 포함에 따른 Ni 뭉침 현상이 관찰되었다. Sn-30Ni과 Sn-40Ni의 경우에는 TLPS 접합 공정 후 상대적으로 치밀한 접합부 단면 미세 구조 조직을 가짐을 확인하였다. TLPS 접합 공정 후 접합부 시편의 DSC 열 분석 결과로부터 TLPS 접합 공정 반응 동안 Sn과 Ni의 충분한 반응이 일어남을 확인하였으며, 접합 공정 후 접합부에는 Sn이 남아 있지 않음을 확인하였다. 추가적으로 공정 온도 변화에 따른 Sn-30Ni TLPS 접합부의 계면반응 및 기계적 강도 시험이 수행되었다. TLPS 접합 공정 후 접합부는 Ni-Sn 금속간화합물과 반응하고 남은 Ni 분말들로 구성되었으며, 접합 온도가 증가함에 따라 접합부 칩 전단강도는 증가하였다. 솔더링 온도와 유사한 270 ℃의 접합 온도에서 30분 동안의 TLPS 접합 공정 수행 후 약 30 MPa의 높은 칩 전단 강도 값을 얻었다.

실리콘 직접 접합을 위한 선형가열법의 개발 및 SOI 기판에의 적용 (Development of Linear Annealing Method for Silicon Direct Bonding and Application to SOI structure)

  • 이진우;강춘식;송오성;양철웅
    • 한국표면공학회지
    • /
    • 제33권2호
    • /
    • pp.101-106
    • /
    • 2000
  • SOI (Silicon-On-Insulator) substrates were fabricated with varying annealing temperature of $25-660^{\circ}C$ by a linear annealing method, which was modified RTA process using a linear shape heat source. The annealing method was applied to Si ∥ $SiO_2$/Si pair pre-contacted at room temperature after wet cleaning process. The bonding strength of SOI substrates was measured by two methods of Razor-blade crack opening and direct tensile test. The fractured surfaces after direct tensile test were also investigated by the optical microscope as well as $\alpha$-STEP gauge. The interface bonding energy was 1140mJ/m$^2$ at the annealing temperature of $430^{\circ}C$. The fracture strength was about 21MPa at the temperature of $430^{\circ}C$. These mechanical properties were not reported with the conventional furnace annealing or rapid thermal annealing method at the temperature below $500^{\circ}C$. Our results imply that the bonded wafer pair could endure CMP (Chemo-Mechanical Polishing) or Lapping process without debonding, fracture or dopant redistribution.

  • PDF

DEVELOPMENT OF HYPER INTERFACIAL BONDING TECHNIQUE FOR ULTRA-FONE GRAINED STEELS

  • Kazutoshi Nishimoto;Kazuyoshi Saida;Jeong, Bo-young;Kohriyama, Shin-ichi
    • 대한용접접합학회:학술대회논문집
    • /
    • 대한용접접합학회 2002년도 Proceedings of the International Welding/Joining Conference-Korea
    • /
    • pp.776-780
    • /
    • 2002
  • This paper describes the concept and the characteristics of hyper interfacial bonding developed as a new concept joining process for UFG (ultra-fine grained) steel. Hyper interfacial bonding process is characterized by instantaneous surface melting bonding which involves a series of steps, namely, surface heating by high frequency induction, the rapid removing of heating coil and joining by pressing specimens. UFG steels used in this study have the average grain size of 1.25 ${\mu}{\textrm}{m}$. The surface of specimen can be rapidly heated up and melted within 0.2s. Temperature gradient near heated surface is relatively steep, and peak temperature drastically fell down to about 1100K at the depth of 2~3mm away from the heated surface of specimen. Bainite is observed near bond interface, and also M-A (martensite-austenite) islands are observed in HAZ. Grain size increases with increasing heating power, however, the grain size in bonded zone can be restrained under 11 ${\mu}{\textrm}{m}$. Hardened zone is limited to near bond interface, and the maximum hardness is Hv350~Hv390.

  • PDF