• Title/Summary/Keyword: bipolar junction transistor

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Design and Numerical Analyses of SOI Trench-MOS Bipolar-Mode Field Effect Transistor (SOI 트렌치-모스 바이폴라-모드 전계효과 트랜지스터 구조의 설계 및 수치해석)

  • Kim, Du-Yeong;O, Jae-Geun;Han, Min-Gu;Choe, Yeon-Ik
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.5
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    • pp.270-277
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    • 2000
  • A new Lateral Trench-MOS Bipolar-Mode Field-Effect Transistor(LTMBMFET) is proposed and verified by MEDICI simulation. By using a trench MOS structure, the proposed device can enhance the current gain without sacrificing other device characteristics such as the breakdown voltage. The channel region of the proposed device is formed between the trench MOS structure. So the effect of the substrate voltage is negligible when compared with the conventional device which has a channel region between the gate junction and the buried oxide layer.

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Turn-off time improvement by fast neutron irradiation on pnp Si Bipolar Junction Transistor

  • Ahn, Sung Ho;Sun, Gwang Min;Baek, Hani
    • Nuclear Engineering and Technology
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    • v.54 no.2
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    • pp.501-506
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    • 2022
  • Long turn-off time limits high frequency operation of Bipolar Junction Transistors (BJTs). Turn-off time decreases with increases in the recombination rate of minority carriers at switching transients. Fast neutron irradiation on a Si BJT incurs lattice damages owing to the displacement of silicon atoms. The lattice damages increase the recombination rate of injected holes with electrons, and decrease the hole lifetime in the base region of pnp Si BJT. Fast neutrons generated from a beryllium target with 30 MeV protons by an MC-50 cyclotron were irradiated onto pnp Si BJTs in experiment. The experimental results show that the turn-off time, including the storage time and fall time, decreases with increases in fast neutron fluence. Additionally, it is confirmed that the base current increases, and the collector current and base-to-collector current amplification ratio decrease due to fast neutron irradiation.

Electrothermal Analysis for Super-Junction TMOSFET with Temperature Sensor

  • Lho, Young Hwan;Yang, Yil-Suk
    • ETRI Journal
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    • v.37 no.5
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    • pp.951-960
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    • 2015
  • For a conventional power metal-oxide-semiconductor field-effect transistor (MOSFET), there is a trade-off between specific on-state resistance and breakdown voltage. To overcome this trade-off, a super-junction trench MOSFET (TMOSFET) structure is suggested; within this structure, the ability to sense the temperature distribution of the TMOSFET is very important since heat is generated in the junction area, thus affecting its reliability. Generally, there are two types of temperature-sensing structures-diode and resistive. In this paper, a diode-type temperature-sensing structure for a TMOSFET is designed for a brushless direct current motor with on-resistance of $96m{\Omega}{\cdot}mm^2$. The temperature distribution for an ultra-low on-resistance power MOSFET has been analyzed for various bonding schemes. The multi-bonding and stripe bonding cases show a maximum temperature that is lower than that for the single-bonding case. It is shown that the metal resistance at the source area is non-negligible and should therefore be considered depending on the application for current driving capability.

The Effects of ${\gamma}-rays$ on Power Devices

  • Lho, Young-Hwan;Kim, Ki-Yup;Cho, Kyoung-Y.
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.2287-2290
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    • 2003
  • The electrical characteristics of power devices such as BJT (Bipolar Junction Transistor), and MOSFET (Metal Oxide Field Effect Transistor), etc, are altered due to impinging photon radiation and temperature in the nuclear or the space environment. In this paper, BJT and MOSFET are the two devices subjected to ${\gamma}$ radiation. In the case of BJT, the current gain (${\beta}$) and the collector to Emiter breakdown voltage ($V_{CEO}$) are the two main parameters considered. When it was subjected to ${\gamma}$ rays, the ${\beta}$ decreases as the dose level increases, whereas, $V_{CEO}$ gradually increases as the dose level increases. In the case of MOSFET, the threshold voltage is decreasing as the dose level increases. Here it has been observed the decent rate is an increasing function of the threshold voltage. The on-resistance does not change with respect to the dose. Both the devices recover back the original specification after the annealing is finished. No permanent damage has been occurred.

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A Study on the Method of the Analysis of the Base Gummel Number of the BJT for Integrated Circuits (직접회로용 BJT의 베이스 Gummel Number 해석 방법에 관한 연구)

  • 이은구;김철성
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.52 no.2
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    • pp.74-79
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    • 2003
  • The method of the analysis of the base Gummel number of the BJT(Bipolar Junction Transistor) for integrated circuits based upon the semiconductor physics is proposed and the method of calculating the doping profile of the base region using process conditions is presented. The transistor saturation current obtained from the proposed method of NPN BJT using 20V and 30V process shows an averaged relative error of 6.7% compared with the measured data and the transistor saturation current of PNP BJT shows an averaged relative error of 9.2% compared with the measured data

Design of Super-junction TMOSFET with Embedded Temperature Sensor

  • Lho, Young Hwan
    • Journal of IKEEE
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    • v.19 no.2
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    • pp.232-236
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    • 2015
  • Super-junction trench MOSFET (SJ TMOSFET) devices are well known for lower specific on-resistance and high breakdown voltage (BV). For a conventional power MOSFET (metal-oxide semiconductor field-effect transistor) such as trench double-diffused MOSFET (TDMOSFET), there is a tradeoff relationship between specific on-state resistance and breakdown voltage. In order to overcome the tradeoff relationship, a SJ TMOSFET structure is suggested, but sensing the temperature distribution of TMOSFET is very important in the application since heat is generated in the junction area affecting TMOSFET. In this paper, analyzing the temperature characteristics for different number bonding for SJ TMOSFET with an embedded temperature sensor is carried out after designing the diode temperature sensor at the surface of SJ TMOSFET for the class of 100 V and 100 A for a BLDC motor.

A Study on the Improvement of Forward Blocking Characteristics in the Static Induction Transistor (Static Induction Transistor의 순방향 블로킹 특성 개선에 관한 연구)

  • Kim, Je-Yoon;Jung, Min-Chul;Yoon, Jee-Young;Kim, Sang-Sik;Sung, Man-Young;Kang, Ey-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07a
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    • pp.292-295
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    • 2004
  • The SIT was introduced by Nishizawa. in 1972. When compared with high-voltage, power bipolar junction transistors, SITs have several advantages as power switching devices. They have a higher input impedance than do bipolar transistors and a negative temperature coefficient for the drain current that prevents thermal runaway, thus allowing the coupling of many devices in parallel to increase the current handling capability. Furthermore, the SIT is majority carrier device with a higher inherent switching speed because of the absence of minority carrier recombination, which limits the speed of bipolar transistors. This also eliminates the stringent lifetime control requirements that are essential during the fabrication of high-speed bipolar transistors. This results in a much larger safe operating area(SOA) in comparison to bipolar transistors. In this paper, vertical SIT structures are proposed to improve their electrical characteristics including the blocking voltage. Besides, the two dimensional numerical simulations were carried out using ISE-TCAD to verify the validity of the device and examine the electrical characteristics. A trench gate region oxide power SIT device is proposed to improve forward blocking characteristics. The proposed devices have superior electrical characteristics when compared to conventional device. Consequently, the fabrication of trench oxide power SIT with superior stability and electrical characteristics is simplified.

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Noble SOI

  • 정주영
    • Electrical & Electronic Materials
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    • v.12 no.9
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    • pp.57-63
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    • 1999
  • SOI 구조의 MOSFET은 제조공정이 상대적으로 간단하며 CMOS 래치 업 현상이 일어나지 않고, soft error에 의한 회로의 오동작 가능성이 매우 낮은 이외에도 낮은 기생 정전용량 및 누설전류 특성을 가지므로 0.1 미크론 이하의 소자를 제작하는데 적합하여 저전압, 초고속 VLSI 설계에 적합한 소자로 각광받고 있다. 본고에서는 새로운 구조의 SOI MOSFET 구조들의 특성과 장, 단점을 검토하고 나아가 BJT(Bipolar Junction Transistor) 및 기타 소자들을 SOI 구조로 제작한 결과에 대해 간단히 검토함으로써 1999년 현재 SOI 기술의 현황을 소개하고자 한다.

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The reliability physics of SiGe hetero-junction bipolar transistors (실리콘-게르마늄 이종접합 바이폴라 트랜지스터의 신뢰성 현상)

  • 이승윤;박찬우;김상훈;이상흥;강진영;조경익
    • Journal of the Korean Vacuum Society
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    • v.12 no.4
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    • pp.239-250
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    • 2003
  • The reliability degradation phenomena in the SiGe hetero-junction bipolar transistor (HBT) are investigated in this review. In the case of the SiGe HBT the decrease of the current gain, the degradation of the AC characteristics, and the offset voltage are frequently observed, which are attributed to the emitter-base reverse bias voltage stress, the transient enhanced diffusion, and the deterioration of the base-collector junction due to the fluctuation in fabrication process, respectively. The reverse-bias stress on the emitter-base junction causes the recombination current to rise, increasing the base current and degrading the current gain, because hot carriers formed by the high electric field at the junction periphery generate charged traps at the silicon-oxide interface and within the oxide region. Because of the enhanced diffusion of the dopants in the intrinsic base induced by the extrinsic base implantation, the shorter distance between the emitter-base junction and the extrinsic base than a critical measure leads to the reduction of the cut-off frequency ($f_t$) of the device. If the energy of the extrinsic base implantation is insufficient, the turn-on voltage of the collector-base junction becomes low, in the result, the offset voltage appears on the current-voltage curve.

Degradation of the SiGe hetero-junction bipolar transistor in SiGe BiCMOS process (실리콘-게르마늄 바이시모스 공정에서의 실리콘-게르마늄 이종접합 바이폴라 트랜지스터 열화 현상)

  • Kim Sang-Hoon;Lee Seung-Yun;Park Chan-Woo;Kang Jin-Young
    • Journal of the Korean Vacuum Society
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    • v.14 no.1
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    • pp.29-34
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    • 2005
  • The degradation of the SiGe hetero-junction bipolar transistor(HBT) properties in SiGe BiCMOS process was investigated in this paper. The SiGe HBT prepaired by SiGe BiCMOS process, unlike the conventional one, showed the degraded DC characteristics such as the decreased Early voltage, the decreased collector-emitter breakdown voltage, and the highly increased base leakage current. Also, the cutoff frequency(f/sub T/) and the maximum oscillation frequency(f/sub max/) representing the AC characteristics are reduced to below 50%. These deteriorations are originated from the change of the locations of emitter-base and collector-base junctions, which is induced by the variation of the doping profile of boron in the SiGe base due to the high-temperature source-drain annealing. In the result, the junctions pushed out of SiGe region caused the parastic barrier formation and the current gain decrease on the SiGe HBT device.