• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.290.2-290.2
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• 2016

Recently, organic thin-film transistors have been widely researched for organic light-emitting diode panels, memory devices, logic circuits for flexible display because of its virtue of mechanical flexibility, low fabrication cost, low process temperature, and large area production. In order to achieve high performance OTFTs, increase in accumulation carrier mobility is a critical factor. Post-fabrication thermal annealing process has been known as one of the methods to achieve this by improving the crystal quality of organic semiconductor materials In this paper, we researched the properties of pentacene films with X-Ray Diffraction (XRD) and Atomic Force Microscope (AFM) analyses as different annealing temperature in N2 ambient. Electrical characterization of the pentacene based thin film transistor was also conducted by transfer length method (TLM) with different annealing temperature in Al- and Ti-pentacene junctions to confirm the Fermi level pinning phenomenon. For Al- and Ti-pentacene junctions, is was found that as the surface quality of the pentacene films changed as annealing temperature increased, the hole-barrier height (h-BH) that were controlled by Fermi level pinning were effectively reduced.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.282.1-282.1
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• 2016

The remarkable physical properties of two-dimensional (2D) semiconducting materials such as molybdenum disulfide ($MoS_2$) and tungsten disulfide ($WS_2$) etc. have attracted considerable attentions for future high-performance electronic and optoelectronic devices. The ongoing studies of $MoS_2$ based nonvolatile memories have been demonstrated by worldwide researchers. The opening hysteresis in transfer characteristics have been revealed by different charge confining layer, for instance, few-layer graphene, $MoS_2$, metallic nanocrystal, hafnium oxide, and guanine. However, limited works built their nonvolatile memories using entirely of assembled 2D crystals. This is important in aspect view of large-scale manufacture and vertical integration for future memory device engineering. We report $WS_2$ based nonvolatile memories utilizing functional van der Waals heterostructure in which multi-layered graphene is encapsulated between $SiO_2$ and hexagonal boron nitride (hBN). We experimentally observed that, large memory window (20 V) allows to reveal high on-/off-state ratio (>$10^3$). Moreover, the devices manifest perfect retention of 13% charge loss after 10 years due to large graphene/hBN barrier height. Interestingly, the performance of our memories is drastically better than ever published work related to $MoS_2$ and black phosphorus flash memory technology.

• Journal of the Korean Wood Science and Technology
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• v.19 no.3
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• pp.45-52
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• 1991

To investigate opportunities for wood frame housing and to activate wood frame house construction, trends of construction activities. preference about housing, and building codes related to wood frame housing were discussed. And two models of wood frame house were developed and construction cost was analyzed to compare with comparative masonry houses. The results obtained were as follows: 1. While 77.8% of people prefer single-family houses, majority of people(74.9%), ironically, possess multi-family houses such as apartments Wood work cost was ratio of 4% of total building cost. while wood material cost accounted merely for 11 % out of total building material cost. 2. Building code was not major barrier to residential house at height under 13m. The building code regulated major structural member and family boder wall of multi-family house to be built with fire retardant material. 3. The proper wood frame house was analyzed of town house or villa type locating in suburban of big city with hot ondol system for the upper middle class. 4 There was no difference in construction cost between western style wood frame house and comparable masonry house, but construction cost for Korean style wood frame house is 27% higher than that of comparable masonry house. It was necessary to reduce materials and cost down by prefabrication technique for both style of wood frame house.

• Transactions on Electrical and Electronic Materials
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• v.14 no.1
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• pp.36-38
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• 2013

Eight sample panels using an indium tin oxide(ITO)-coated glass substrate were fabricated, with barrier ribs formed of 55 ${\mu}m$ height and 10 ${\mu}m$ width. The upper and lower substrates were designed with the same panel condition, so a cell gap of 110 ${\mu}m$ was obtained. The charged particles in a cell consisted of $TiO_2$ (for white color) or carbon black (black color), negative or positive charge control agents, and a polymer. The average diameter of the two types of particles was commonly 10 ${\mu}m$, and their q/m value was -4.5 ${\mu}C/g$ and +4.5 ${\mu}C/g$, respectively. The electrically opposite particles mixed by an agitator were loaded into their cells by a simple particle-loading method. The discharging process proceeded at a humidity of 80% and a temperature of $30^{\circ}C$. Reflectivity was measured depending on discharging time, and a hysteresis curve by bias voltage obtained for comparison between the neutralized and non-neutralized panel, in which the superior optical property of the neutralized panel was ascertained.

• 한국신재생에너지학회:학술대회논문집
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• 2011.05a
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• pp.103.1-103.1
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• 2011

실리콘 이종접합 태양전지에서 계면 결함 밀도는 효율을 결정하는데 가장 중요한 요인으로 작용한다. 계면 결함은 캐리어의 재결합 위치로 작용하여, 계면 결함 밀도가 증가하면 재결합 속도가 증가하게 된다. 흡수층으로 사용되는 실리콘 웨이퍼 (결정질 실리콘)를 가능한 깨끗하게 세정함으로써, 또한 emitter로 쓰이는 비정질 실리콘을 낮은 데미지로 증착하여 계면 결함 밀도를 감소 시킬 수 있다. 이러한 계면 결함 밀도의 감소가 어떠한 변화로 인해 태양전지 특성에 영향을 주는지 시물레이션을 통해 알아보았다. n-type 웨이퍼에 p-type 비정질 실리콘을 emitter로 하여 TCO/p/i/n-type wafer/i/n/TCO/metal의 구조를 적용했고, wafer 전면과 i로 쓰인 무첨가된 비정질 실리콘 간의 계면 결함 밀도를 변수로 적용했다. 그 결과, 계면 결함 밀도가 감소함에 따라 재결합이 감소하여 태양전지 특성이 증가하는 측면도 있지만, 흡수층의 장벽 (barrier height)이 높아져 재결합을 더욱 감소시킴으로 인해 태양전지 특성이 증가함을 알 수 있었다.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2014.11a
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• pp.226-227
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• 2014

We demonstrate nanoscale local anodic oxidation (LAO) patterning on few layer graphene using atomic force microscope (AFM) at room temperature and normal atmosphere. We focus on the humidity dependency in nanoscale oxidation of graphene. The relationship between the oxidation size and the AFM setting values, such as set point, tip speed, and humidity are observed. By changing these values, proper parameters were found to produce features on demand size. This technique provides an easy way to form graphene oxide lithography without any chemical resists. We have obtained oxidation size down to 50-nm with 6-nm-height oxide barrier line with $0.1{\mu}m/s$ tip scanning speed and micrometer size symbols on a graphene flake. We attribute the bumps to local anodic oxidation on graphene surface and combination of oxygen ions into the graphene lattice.

• Wind and Structures
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• v.17 no.2
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• pp.203-225
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• 2013

An analysis framework for vehicle-bridge dynamic interaction system under turbulent wind is proposed based on the relevant theory of wind engineering and dynamics. Considering the fluctuating properties of wind field, the stochastic wind velocity time history is simulated by the Auto-Regressive method in terms of power spectral density function of wind field. The bridge is represented by three-dimensional finite element model and the vehicle by a multi-rigid-body system connected by springs and dashpots. The detailed calculation formulas of unsteady aerodynamic forces on bridge and vehicle are derived. In addition, the form selection of wind barriers, which are applied as the windbreak measures of newly-built railways in northwest China, is studied based on the suggested evaluation index, and the suitable values about height and porosity rate of wind barriers are studied. By taking a multi-span simply-supported box-girder bridge as a case study, the dynamic response of the bridge and the running safety indices of the train traveling on the bridge with and without wind barriers are calculated. The limit values of train speed with respect to different wind velocities are proposed according to the allowance values in the design code.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.1
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• pp.157-165
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• 2001

We analyzed the electrical characteristics of platinum silicide schottky junction to develope the voltage swing in Integrated Schottky Logic gates, and simulated the characteristics with the programs in this junctions. Simulation programs for analytic characteristics are the Medichi tool for device structure, Matlab for modeling and SUPREM V for fabrication process. The silicide junctions consist of PtSi and variable silicon substrate concentrations in ISL gates. Input parameters for simulation characteristics were the same conditions as process steps of the device farications process. The analitic electrical characteristics were the turn-on voltage, saturation current, ideality factor in forward bias, and has shown the results of breakdown voltage between actual characteristics and simulation characteristics in reverse bias. As a result, the forward turn-on voltage, reverse breakdown voltage, barrier height were decreased but saturation current and ideality factor were increased by substrates increased concentration variations.

• Journal of Korea Multimedia Society
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• v.3 no.5
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• pp.535-541
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• 2000

In this paper, we analyzed the characteristics of schottky junction to develop the voltage swing of ISL, and simulated the characteristics with the programs at this junctions. Simulation programs for analytic characteristics are the SUPREM V, SPICE, Medichi, Matlab. The schottky junction is rectifier contact between platinum silicide and silicon, the characteristics with programs has simulated the same conditions. The analytic parameters were the turn-on voltage, saturation current, ideality factor in forward bias, and has shown the results of breakdown voltage between actual characteristics and simulation characteristics in reverse bias. As a result, th forward turn-on voltage, reverse breakdown voltage, barrier height were decreased but saturation current and ideality factor were increased by substrates increased concentration variations.

• Electrical & Electronic Materials
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• v.11 no.10
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• pp.60-65
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• 1998

Deposition conditions, surface morphology, and electrical properties of polyamic acid alkylamine salts (PAAS) Langmuir-Blodgett(LB) films have been investigated through a study of surface pressure-area $\pi$-A isotherms, AFM (atomic force microscopy), and current-voltage characteristics. To obtain the optimum conditions of film deposition, the $\pi$-A isotherms were examined by varying temperature, barrier moving speed, dipping speed, spreading amount of solution etc. The Z-type LB films were made at the surface pressure of 5 mN m-1 and 25 mN m-1 for the AFM study; the former surface pressure forms the gas phase and the latter one forms the solid phase. The LB film made in the gas phase show domains with a size of about 200 A diameter and 70 A height. However, the LB films made in the solid phase show a very smooth surface with 2 A surface roughness. In the current-voltage characteristics measured along the perpendicular direction of the films, ohmic conduction has been observed below 105 V cm-1 and the calculated electrical conductivity is about 10-13 S cm-1. Nonohmic conduction has been observed above = 10-11 V cm and the conduction mechanism can be explained by the Schottky effect.