• Title/Summary/Keyword: bandgap reference circuit

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Inductance-Enhanced Corrugated Ground Planes for Miniaturization and Common Mode Noise Suppression of Differential Line in High-Speed Packages and PCBs (고속 반도체 패키지 및 PCB 내 공통 모드 잡음 감쇠를 위한 소형화 된 인덕턴스 향상 파형 접지면 기반 차동 신호선)

  • Tae-Soo Park;Myunghoi Kim
    • Journal of Advanced Navigation Technology
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    • v.28 no.2
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    • pp.246-249
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    • 2024
  • In this paper, we present a miniaturized differential line (DL) using inductance-enhanced corrugated ground planes (LCGP) for effective common-mode (CM) noise suppression in high-speed packages and printed circuit boards. The LCGP-DL demonstrates the CM noise suppression in the frequency range from 2.09 GHz to 3.6 GHz. Furthermore, to achieve the same low cutoff frequency, the LCGP-DL accomplishes a remarkable 23.2% reduction in size compared to a reference DL.

Reviews and Proposals of Low-Voltage DRAM Circuit Design (저전압 DRAM 회로 설계 검토 및 제안)

  • Kim, Yeong-Hui;Kim, Gwang-Hyeon;Park, Hong-Jun;Wi, Jae-Gyeong;Choe, Jin-Hyeok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.4
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    • pp.251-265
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    • 2001
  • As the device scaling proceeds, the operating voltage(VDD) of giga-bit DRAMs is expected to be reduced to 1.5V or down, fir improving the device reliability and reducing the power dissipation. Therefore the low-voltage circuit design techniques are required to implement giga-bit DRAMs. In this work, state-of-art low-voltage DRAM circuit techniques are reviewed, and four kinds of low-voltage circuit design techniques are newly proposed for giga-bit DRAMs. Measurement results of test chips and SPICE simulation results are presented for the newly proposed circuit design techniques, which include a hierarchical negative-voltage word-line driver with reduced subthreshold leakage current, a two-phase VBB(Back-Bias Voltage) generator, a two-phase VPP(Boosted Voltage) generator and a bandgap reference voltage generator.

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A Temperature- and Supply-Insensitive 1Gb/s CMOS Open-Drain Output Driver for High-Bandwidth DRAMs (High-Bandwidth DRAM용 온도 및 전원 전압에 둔감한 1Gb/s CMOS Open-Drain 출력 구동 회로)

  • Kim, Young-Hee;Sohn, Young-Soo;Park, Hong-Jung;Wee, Jae-Kyung;Choi, Jin-Hyeok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.8
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    • pp.54-61
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    • 2001
  • A fully on-chip open-drain CMOS output driver was designed for high bandwidth DRAMs, such that its output voltage swing was insensitive to the variations of temperature and supply voltage. An auto refresh signal was used to update the contents of the current control register, which determined the transistors to be turned-on among the six binary-weighted transistors of an output driver. Because the auto refresh signal is available in DRAM chips, the output driver of this work does not require any external signals to update the current control register. During the time interval while the update is in progress, a negative feedback loop is formed to maintain the low level output voltage ($V_OL$) to be equal to the reference voltage ($V_{OL.ref}$) which is generated by a low-voltage bandgap reference circuit. Test results showed the successful operation at the data rate up to 1Gb/s. The worst-case variations of $V_{OL.ref}$ and $V_OL$ of the proposed output driver were measured to be 2.5% and 7.5% respectively within a temperature range of $20^{\circ}C$ to $90^{\circ}C$ and a supply voltage range of 2.25V to 2.75V, while the worst-case variation of $V_OL$ of the conventional output driver was measured to be 24% at the same temperature and supply voltage ranges.

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A Integrated Circuit Design of DC-DC Converter for Flat Panel Display (플랫 판넬표시장치용 DC-DC 컨버터 집적회로의 설계)

  • Lee, Jun-Sung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.10
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    • pp.231-238
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    • 2013
  • This paper describes a DC-DC converter IC for Flat Panel Displays. In case of operate LCD devices various type of DC supply voltage is needed. This device can convert DC voltage from 6~14[V] single supply to -5[V], 15[V], 23[V], and 3.3[V] DC supplies. In order to meet current and voltage specification considered different type of DC-DC converter circuits. In this work a negative charge pump DC-DC converter(-5V), a positive charge pump DC-DC converter(15V), a switching Type Boost DC-DC converter(23V) and a buck DC-DC converter(3.3V). And a oscillator, a thermal shut down circuit, level shift circuits, a bandgap reference circuits are designed. This device has been designed in a 0.35[${\mu}m$] triple-well, double poly, double metal 30[V] CMOS process. The designed circuit is simulated and this one chip product could be applicable for flat panel displays.

A High Current Efficiency CMOS LDO Regulator with Low Power Consumption and Small Output Voltage Variation

  • Rikan, Behnam Samadpoor;Abbasizadeh, Hamed;Kang, Ji-Hun;Lee, Kang-Yoon
    • Journal of IKEEE
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    • v.18 no.1
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    • pp.37-44
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    • 2014
  • In this paper we present an LDO based on an error amplifier. The designed error amplifier has a gain of 89.93dB at low frequencies. This amplifier's Bandwidth is 50.8MHz and its phase margin is $59.2^{\circ}C$. Also we proposed a BGR. This BGR has a low output variation with temperature and its PSRR at 1 KHz is -71.5dB. For a temperature variation from $-40^{\circ}C$ to $125^{\circ}C$ we have just 9.4mV variation in 3.3V LDO output. Also it is stable for a wide range of output load currents [0-200mA] and a $1{\mu}F$ output capacitor and its line regulation and especially load regulation is very small comparing other papers. The PSRR of proposed LDO is -61.16dB at 1 KHz. Also we designed it for several output voltages by using a ladder of resistors, transmission gates and a decoder. Low power consumption is the other superiority of this LDO which is just 1.55mW in full load. The circuit was designed in $0.35{\mu}m$ CMOS process.

An Implementation of Temperature Independent Bias Scheme in Voltage Detector (온도에 무관한 전압검출기의 바이어스 구현)

  • Moon, Jong-Kyu;Kim, Duk-Gyoo
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.39 no.6
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    • pp.34-42
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    • 2002
  • In this paper, we propose a temperature independent the detective voltage source in voltage detector. The value of a detective voltage source is designed to become m times of silicon bandgap voltage at zero absolute temperature. By properly choosing the temperature coefficient of diode, the temperature coefficient of a concave voltage nonlinearities generated by the ${\Delta}V_{BE}$ section of diode between base and emitter of transistors with a different area can be summed with convex nonlinearities the $V_{BE}$ voltage to achieve the near zero temperature coefficient of the detective voltage source. We designed that the value of a detective voltage can be varied by ${\Delta}V_{BE}$, the $V_{BE}$multiplier circuit and resistor. In order to verify the performance of a proposed detective voltage source, we manufactured the voltage detector IC for 1.9V which is fabricated in $6{\mu}m$ Bipolar technology and measured the operating characteristics, the temperature coefficient of a detective voltage. To reduce the deviation of a detective voltage in the IC process step, we introduced a trimming technology, ion implantation and an isotropic etching. In manufactured IC, the detective voltage source could achieve the stable temperature coefficient of 29ppm/$^{\circ}C$ over the temperature range of -30$^{\circ}C$ to 70$^{\circ}C$. The current consumption of a voltage detector constituted by the proposed detective voltage source is $10{\mu}A$ from 1.9V-supply voltage at room temperature.