• 한국산학기술학회논문지
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• 제8권6호
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• pp.1604-1612
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• 2007

최근 10년간 기업은 ERP시스템을 적극적으로 도입하였다. 이에 대한 평가도 많았지만 종합적인 평가 결과만 있을 뿐 구체적인 성과 창출에 대해서는 연구가 많지 않았다. 특히 ERP시스템의 도입의 성과가 한 가지로 나타날 수 없을 뿐만 아니라 성과 창출 단계도 상이하다. 따라서 본 연구에서는 확산된 국내 ERP시스템 사용 기업을 대상으로 ERP시스템의 경영성과 창출시점이 언제 나타나는지를 연구함으로써 ERP도입 업체의 경영성과를 예측하고, 이를 통한 ERP운영 방법론을 수정할 수 있는 기회를 부여하고자한다. ERP성과를 측정하기 위한 지표는 균형성과표를 활용하였다. 또한 ERP시스템 활성화 요인과 경영성과의 상관관계를 확인하기 위하여 상관관계 분석을 실시하였고, 빈도분석을 통하여 ERP시스템 단계에 따른 경영성과 창출단계를 연구하였다.

• 한국전자파학회논문지
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• 제18권11호
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• pp.1262-1270
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• 2007

본 논문에서는 feedforward와 post-distortion 기법을 이용하여 평형 증폭기 내에서 발생하는 혼변조 왜곡 성분을 제거할 수 있는 새로운 왜곡 상쇄 메커니즘인 cross post-distortion 선형화 기법을 제안한다. 출력 동적 영역과 대역폭 측면에서 제안하는 선형화 방식은 기존의 feedforward 방식에 뒤지지 않는 성능을 가지고 있으면서 상대적으로 높은 효율을 제공한다. 이론적 뒷받침을 위해 제안하는 시스템과 feedforward 방식의 전력 증폭기와 오차증폭기의 전력 용량을 비교 분석하였고, IMT-2000 대역에서 실제 구현을 통하여 이를 실험적으로 뒷받침하였다. 최대 출력 전력 240 W의 기지국용 상용 대전력 증폭기에 적용했을 때, wideband code division multiple access (WCDMA) 4FA 신호에 대하여 평균 출력 전력 40 dBm에서 약 18.6 dB의 개선 효과를 얻었다. 제작된 전력 증폭기는 WCDMA 신호 기준으로 feedforward 방식에 비해 약 2 % 개선된 효율을 보였다.

• Journal of Electrical Engineering and Technology
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• 제8권3호
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• pp.610-612
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• 2013

A novel balanced distributed amplifier (DA) was proposed using novel impedance transforming MEMS baluns. The impedance transforming MEMS balun is matched to $50{\Omega}$ at one input port and $25{\Omega}$ at two output ports. It is based on the electric field mode-change method, thus it is strongly independent of frequency and very compact. The novel balanced DA consists of two $25{\Omega}$-matched DAs and these are combined by $50{\Omega}$-to-$25{\Omega}$ baluns. Theoretically, it has two times wider bandwidth and power capability than the conventional DA. So as to verify the proposed concept, we designed and fabricated a conventional DA and the proposed one using 0.15-${\mu}m$ GaAs pHEMT technology.

• 한국전자파학회논문지
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• 제23권5호
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• pp.606-612
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• 2012

W-CDMA 단말기에 적용 가능한 고효율 다중 모드 balanced 전력증폭기 구조를 제안하였다. 제안된 전력증폭기는 2단 증폭기로 구성되었고, 낮은 전력 영역 및 중간 전력 영역에서 효율을 증가시키기 위해 stage-bypass 기법과 부하 임피던스 스위칭 기법이 적용되었다. 이를 통해 4가지의 고효율 전력 모드를 구현하였으며, 제안된 구조를 실험적으로 검증하기 위해 GaAs HBT 전력증폭기를 설계 및 제작하였고, 측정하였다.

• Journal of electromagnetic engineering and science
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• 제8권3호
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• pp.91-95
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• 2008

This paper presents a direct-conversion I/Q up-mixer block, which supports $3{\sim}5$ GHz ultra-wideband(UWB) applications. It consists of a VI converter, a double-balanced mixer, a RF amplifier, and a differential-to-single signal converter. To achieve wideband characteristics over $3{\sim}5$ GHz frequency range, the double-balanced mixer adopts a shunt-peaking load. The proposed RF amplifier can suppress unwanted common-mode input signals with high linearity. The proposed direct-conversion I/Q up-mixer block is implemented using $0.18-{\mu}m$ CMOS technology. The measured results for three channels show a power gain of $-2{\sim}-9$ dB with a gain flatness of 1dB, a maximum output power level of $-7{\sim}-14.5$ dBm, and a output return loss of more than - 8.8 dB. The current consumption of the fabricated chip is 25.2 mA from a 1.8 V power supply.

• 한국정보통신설비학회:학술대회논문집
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• 한국정보통신설비학회 2007년도 학술대회
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• pp.423-426
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• 2007

An active Balun is designed for RFID reader at 2.45GHz. The Balun is integrated inside the receiver, then the LNA and mixer can be connected. The unbalanced LNA output signal is transformed to a balanced signal at the input mixer The RF mixer and LO mixer, by using this balun. The Balun provided a balanced signal with two output stage, gain mismatch is 0.116dB. The phase show a good behavior with $163.918^{\circ}$,$-16.609^{\circ}$. The phase mismatch is about $0.527^{\circ}$. The tight difference between the gain and phase on each brancd, is because of the used capacitor and integrated inductor and the other parasitic element inside the balun.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2003년도 종합학술발표회 논문집 Vol.13 No.1
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• pp.326-329
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• 2003

In this paper, we designed and implemented a high power amplifier(HPA) to achieve the high Power Added Efficiency(PAE) over 40% at the 90W output power for the ISM-band(fo=2.45GHz). HPA presented in this paper has 3-stage drive amplifier and 1-stage final amplifier. In the final amplifier, we utilized balanced amplifier configuration with GaAs FET and each of two amplifiers has the push-pull configuration to increase PAE. From the measurement results, we obtained PAE of 42.95% at the 90.57W output power.

• Journal of Power Electronics
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• 제16권2호
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• pp.447-454
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• 2016

A single-ended primary-inductor converter (SEPIC) features low input current ripple and output voltage up/down capability. However, the switching devices in a two-level SEPIC suffer from high voltage stresses and switching losses. To cope with this drawback, this study proposes a three-level SEPIC that uses a low voltage-rated switch and thus achieves better switching performance compared with the two-level SEPIC. The three-level SEPIC can reduce switch voltage stresses and switching losses. The converter operation and control method are described in this work. The experimental results for a 500 W prototype converter are also discussed. Experimental results show that unlike the two-level SEPIC, the three-level SEPIC achieves improved power efficiency with balanced capacitor voltages.

• Journal of the Optical Society of Korea
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• 제18권5호
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• pp.466-471
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• 2014

An asynchronous optical packet-switching (AOPS) node with load-balancing capability can achieve better performance in reducing the high packet-loss ratio (PLR) and time delay caused by unbalanced traffic. This paper proposes a novel dynamic load-balancing algorithm for an AOPS node with limited buffer and without wavelength converters, and considering the data flow distribution and service levels. By calculating the occupancy state of the output ports, load state of the input ports, and priorities for data flow, the traffic is balanced accordingly. Simulations demonstrate that asynchronous variant data packets and output traffic can be automatically balanced according to service levels and the data flow distribution. A PLR of less than 0.01% can be achieved, as well as an average time delay of less than 0.46 ns.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 전력전자학술대회
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• pp.114-116
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• 2018

This paper presents a control strategy to achieve the balanced sinusoidal output currents, as well as sinusoidal input currents for the matrix converter (MC) under unbalanced input voltages. By regulating the modulation index of the converter according to the instantaneous input voltages, the output currents are kept balanced and sinusoidal. In order to obtain sinusoidal input currents, the input power factor angle should be dynamically calculated based on the positive and negative sequence components of the input voltages. This paper proposes a simple method to construct the expected input power factor angle without the complicated sequence component extraction of input voltages. Simulation results are given to validate the effectiveness of the proposed control strategy.