• Korean Journal of Computational Design and Engineering
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• v.4 no.2
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• pp.87-99
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• 1999

We developed a Part Information Brokering System, namely PIBS, that can inter-link part suppliers and buyers using WWW(World Wide Web). The major contribution of this paper is that the system provides a 3D collaboration environment that enables multiple users to share the same workspace where they cooperatively manipulate part features in real time. PIBS carries out two major functions: one to maintain part data in a part library, and the other to provide the means for the clients to cooperate. An object-oriented database is used for the part library which stores apart information registered by part suppliers. VRML(Virtual Reality Modeling Language) the ISO standard for 3D visualization on WWW, is used to represent 3D part models. Several Java programs have been implemented to support synchronous and a synchronous communication of the 3D models. Once the users are interconnected through the system, a user's manipulation of part objects is transparently and instantaneously transmitted to the others. This means that all the participants can are the same view and movement of the 3D part models. Since the system is developed using a Java applet-server architecture, it requires no additional software other than standard web browser. The prototype system has been successfully implemented, and demonstrated its applicability to virtual 3D part information sharing.

• Proceedings of the Korean Information Science Society Conference
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• 2002.10d
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• pp.391-393
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• 2002

최근 가상교육에서 학습 기술의 상호 운용성을 기반으로 한 표준화의 필요성을 인식하고 여러 국제표준기관을 통해서 기반 환경과 컨텐트 명세 및 활용에 대한 표준화 작업이 이루어지고 있다. 이로 인해 e-learning 분야에서는 국제표준을 소개하고 체제적으로 AICC(Aviation Industry CBT Committee), IMS(Instructional Management Systems) Global Learning Consortium, ADL(Advanced Distributed Learning)을 중심으로 진행되어 오고 있다. 특히, 미래의 진보적인 e-learning 환경 개발로, 기능별 5계층으로 구성된 LTSA(Learning Technology Standard Architecture)를 제정하고 이를 통한 개발을 지원하고 있다. 하지만, 이는 시스템 구성요소를 정의한 계층 3의 경우 데이터 흐름 모델로 작성되어 현재 개발 수준과 일치하지 않는 문제점을 가지는 모델로 인정한다. 본 논문에서는 표준 모델링 언어인 UML(Unified Modeling Language)을 통해 모델을 재정의하고, 각 프로세스별 단계를 메타모델로 제시하여 개발과 아키텍처의 이해에 대한 문제점을 해결하고자 한다. 또한, 재정의된 모델을 기반으로 e-learning 지원을 위한 분석, 설계 프로세스를 정의하여 이에 대한 사례를 제시한다. 이는 아키텍처를 기반으로 한 메타모델과 프로세스를 통한 교육영역의 질의 응답 학습 도구인 QALT(Query-Answer Learning Tool)에 적용한다. 모델의 재정의로 아키텍처의 이해성 및 이를 기반으로 하는 교육용 애플리케이션 개발의 용이성의 증대를 기대할 수 있으며, 모델의 재사용성을 보장할 수 있다.

• Geomechanics and Engineering
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• v.10 no.2
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• pp.225-245
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• 2016

Settlement of foundations in permafrost regions primarily results from three physical and mechanical processes such as thaw consolidation of permafrost layer, creep of warm frozen soils and the additional deformation of seasonal active layer induced by freeze-thaw cycling. This paper firstly establishes theoretical models for the three sources of settlement including a statistical damage model for soils which experience cyclic freeze-thaw, a large strain thaw consolidation theory incorporating a modified Richards' equation and a Drucker-Prager yield criterion, as well as a simple rheological element based creep model for frozen soils. A novel numerical method was proposed for live computation of thaw consolidation, creep and freeze-thaw cycling in corresponding domains which vary with heat budget in frozen ground. It was then numerically implemented in the FISH language on the FLAC platform and verified by freeze-thaw tests on sandy clay. Results indicate that the calculated results agree well with the measured data. Finally a model test carried out on a half embankment in laboratory was modeled.

• The Transactions of the Korea Information Processing Society
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• v.7 no.9
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• pp.2857-2866
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• 2000

As software technology has made progress, object-oriented CASE tools have become more important. This paper presents the process and similarity in design and implementation of OODesigner, an object-oriented CASE tool, on three platfonns and outlines a kind of generic architecture for the design and the implementation of CASE tools. OODesigner is a tool that was initially developed to support OMT. An initial Unix version has been developed since 1994. In 1997, after the completion of the Unix version, we began developing a Java version and a Windows version supporting UML. The development of a CASE tool is a typical application of the Model-View-ControllerO'vIVC) paradigm. Thus, we obtained a common design pattern among the versions in the MVC point of views. This design similarity can be used to develop several kinds of CASE tools with the corresponding design notations.

• Journal of the Society of Naval Architects of Korea
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• v.42 no.1 s.139
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• pp.64-72
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• 2005

Digital manufacturing is a technology to simulate the real manufacturing process using the virtual model representing the physical schema and the behavior of the real manufacturing system including resources, processes and product information. Therefore, it can optimize the manufacturing system or prevent the bottleneck processes through the simulation before the manufacturing plan is executed. This study presents a method to apply the digital manufacturing technology for the steel cutting process in shipyard. The system modeling of cutting shop is carried out using the IDEF and UML which is a visual modeling language to document the artifacts of a complex system. Also, virtual NC simulators of the cutting machines are constructed to emulate the real operation of cutting machines and NC codes. The simulators are able to verify the cutting shape and estimate the precise cycle time of the planned NC codes. The validity of the virtual model is checked by comparing the real cutting time and shape with the simulated results. It is expected that the virtual NC simulators can be used for accurate estimation of the cutting time and shape in advance of real cutting work.

• The Transactions of the Korea Information Processing Society
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• v.3 no.5
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• pp.1346-1353
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• 1996

In this paper, we propose a modeling method for the flip-flops and test generation algorithms to detect the faults in the sequential circuits using VHDL in the high-level design environment. RS, JK, D and T flip-flops are modeled using data flow types. The sequence of micro-operation which is the basic structure of a chip-level leads to a control point where varnishing occurs to one of two micro- operation sequence. In order to model the fault of one micro-operation(FMOP) that perturb another micro-operation effectively, the concept of goal trees and some heuristic rules are used. Given a faulty FMOP or fault of control point (FCON), a test pattern is generated by fault sensitization, path sensitization and determination of the imput combinations that will justify the path sensitization. The fault models are restricted to the data flow model in the ARCHITECTURE statement of VHDL. The proposed algorithm is implemented in the C language and its efficiency is confirmed by some examples.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.970-973
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• 2003

Recently, the development paradigm of enterprise information system has been moved from 2-tier environment to 3-tier environment. 3-tier environment makes possible to develop more efficient system in terms of the performance, extension, deployment and maintenance. The ship drawing process management system which manages a long-term drawing process and a great number of designers has to support an accuracy and a real-time of information but it is impossible because it is still served in 2-tier environment and some process of them is not developed yet. In this paper, we implemented the analysis and design of system based on CBD(Component Based Development) for the purpose of hanging the environment from two-dimensional Client/server architecture environment to COM＋ based 3-tier architecture environment. And by completing a development of total system, the productivity and the efficiency of the ship drawing process management system will be improved. And a wide reuse of components makes possible to improve the productivity and efficiency of system.

• Journal of KIISE:Computing Practices and Letters
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• v.11 no.1
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• pp.92-99
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• 2005

In this paper, we present a high-level design methodology applied on a network system-on-a-chip(SOC) using SystemC. The main target of our approach is to get optimum performance parameters for high network address translation(NAT) throughput. The Fast Ethernet media access controller(MAC) and its direct memory access(DMA) controller are modeled with SystemC in transaction level. They are calibrated through the cycle-based measurement of the operation of the real Verilog register transfer language(RTL). The NAT throughput of the model is within $\pm$10% error compared to the output of the real evaluation board. Simulation speed of the model is more than 100 times laster than the RTL. The validated models are used for intensive architecture exploration to find the performance bottleneck in the NAT router.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.8
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• pp.77-83
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• 2016

International standards for systems safety have been established in various areas of industry. Such standards recommend that safety design activities be carried out early on in the beginning of systems development. Hazard analysis should be done in close interaction with the conceptual design of the system. This paper focuses on how to verify whether the safety goals are met while considering system design issues. The architecture of the underlying system was first modeled using SysML, a systems modeling language, and then hazard analysis was performed based on architectural information to obtain a system failure model. Thereafter, an integrated model was developed by combining the SysML failure model and the architectural model, and then safety designs were added to prevent system failure. Finally, a simulation of the developed model was performed to see if a system functions even when some components are failing.

• Journal of KIISE:Software and Applications
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• v.34 no.8
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• pp.689-696
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• 2007

It is important issue for software architects to estimate performance of software in the early phase of the development process due to the need to verify non-functional requirements and estimation of performance in various stages of architectural design. In order to analyze performance of software, there are many approaches to translate software architecture represented by Unified Modeling Language, into analytical models. However, in the development of agent-based systems, these approaches ignore or simplify the crucial details of the underlying performance of the agent platform. In this paper, we propose performance prediction methodology for agent based system using formal semantic descriptions, and then, we transform the descriptions into queuing network model which model reflects performance of hardware and software platform. We prove the accuracy of proposed methodology using prototype implementation. The accuracy is summarized at 80%.