• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2013년도 추계학술대회
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• pp.722-725
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• 2013

본 연구에서는 열처리를 하지 않은 소자와 열처리 소자의 기본 특성을 비교, 분석하고 온도에 따른 특성 변화를 확인하였다. 사용된 소자는 상부전극이 Pt/Ti(150nm), 하부전극은 Pt(150nm), 산화층은 $HfO_2$(70nm)이고, 열처리 온도는 $500^{\circ}C$, $850^{\circ}C$ 이다. 측정 소자 성능은 Set/Reset 전압, sensing window(저항상태 차이)다. 측정결과 세 종류의 소자의 기본 특성은 열처리별 온도가 높을수록 Set/Reset전압과 sensing window가 증가하였다. 온도에 따른 기본특성 분석 실험 결과 온도가 증가함에 따라 Set/Reset전압과 sensing window가 감소하였다. Set/Reset 전압의 온도에 따른 변화율은 $850^{\circ}C$ 열처리한 소자가 제일 작았고, sensing window의 변화율은 $500^{\circ}C$ 열처리 소자에서 가장 작은 변화율을 보였다. Set/Reset 전압의 변화율 과 sensing window를 고려했을 때 $500^{\circ}C$ 열처리 소자가 좋은 메모리 특성을 보였다.

• 한국결정성장학회:학술대회논문집
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• 한국결정성장학회 1997년도 Proceedings of the 12th KACG Technical Meeting and the 4th Korea-Japan EMGS (Electronic Materials Growth Symposium)
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• pp.125-129
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• 1997

The effects of the moisture and thermal annealing on CLBO crystal have been investigated. CLBO has hydrated at high humidity condition, resulting in 5B$_2$O$_3$$.$Cs$_2$O$.$8H$_2$O. The surface hydration seems to induce the cracking and the refractive index change in CLBO. The thermal annealing is effective to restore the changed index.

• Journal of information and communication convergence engineering
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• 제8권1호
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• pp.99-102
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• 2010

Large-scaled area and aligned copper oxide nanowires have been synthesized by a vapor-phase approach to the facial synthesis of copper oxide nanowires supported on the surface of a copper gasket. The effects of annealing temperature and time were investigated. Long and aligned nanowires can only formed within a narrow temperature range from 400 to $500^{\circ}C$ for 4 hrs. Annealing copper gasket in static air produces large-area, uniform, but not well vertically aligned nanowires along the copper gasket surface. The surface of copper gasket is converted into bicrystal CuO nanowires was observed after the copper gasket is annealed under static air condition.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.527-530
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• 2002

A lot of efforts have been focused on the optimization of PIT parameters for Bi-2223/Ag wire. In this paper, initial annealing of Bi-2223/Ag wire to transform Bi-2212 orthorhombic from Bi-2212 tetragonal Precursor was investigated. This initial annealing step at low oxygen partial pressure were to transform Bi-2212 orthorhombic structure and to reduce the formation of second phases at superconducting wire. However Bi-2223 Phases were appeared at higher annealing temperature. Critical currents(Je) of Bi-2223/Ag tapes were sintered at low oxygen Partial pressure were higher than that of the wires sintered at atmosphere condition. In order to investigate the effect of rolling reduction ratio, Bi-2223/Ag HTS tapes were rolled with different reduction ratio. There were no clear difference of Je and filaments shape with various rolling reduction ratio.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1990년도 하계학술대회 논문집
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• pp.261-264
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• 1990

The specific contact resistance(SCR) of metal-semiconductor interface is an important design parameter for VLSI interconnecting technology. As the critical feature size of the integrated structures decrease, the physical size of ohmic contacts will also decrease and the series contact resistance will increase. Al-Si contacts on the annealing condition are studied. The propreties of the contacts depend considerably on the annealing procedures. Barrier height is measured from Capacitance-Voltage characteristics. The specific contact resistance are analyzed using a modified four point method.

• 한국초전도저온공학회:학술대회논문집
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• 한국초전도저온공학회 2003년도 학술대회 논문집
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• pp.81-84
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• 2003

The effect of annealing condition on the texture and microstructure development in Ni tapes fabricated by cold-rolling including powder metallurgy was investigated. The Pole-figure results showed that the Ni tapes annealed at lower temperature than 50$0^{\circ}C$ were the mixture of brass deformation texture and cube texture. The specimens annealed at high temperatures had only well-developed cube texture and the FWHMs of in-plane and out-of-plane were in the range of 8-10$^{\circ}$. The degree of texture was not significantly depended on annealing temperatures. The grain morphologies of Ni tapes prepared at low temperatures showed serrated grain boundaries due to incomplete recrystallization, but the specimens prepared at high temperatures showed stabilized grain shape without serrated grain boundaries.

• 대한전자공학회논문지
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• 제27권1호
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• pp.81-90
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• 1990

In this study, ion beam deposited tungsten thin film for gate material of GaAs SAGFET(Self Aligned Gate FET) was annealed from 800\ulcorner to 900\ulcorner using RTA and detailed investigations of structural and electrical characteristics of this film were carried out using four-point probe, XRD, SEM, AES and current-voltage measurement. Investigated results showed phase of as deposited tungsten film was fine grain \ulcornerphase and phase tdransformation of this film into \ulcornerphase occured at annealing condition of 900\ulcorner, 6sec. But regardless of phase transformation, electrical characteristics of tungsten film were very stable to 900\ulcorner and in case of 900\ulcorner, 4sec annealing condition Schottky barrier height obtained from 10 diodes measurements was 0.66 + 0.003 eV.

• 반도체디스플레이기술학회지
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• 제6권3호
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• pp.41-45
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• 2007

The (SrCa)$TiO_3$(SCT) thin films were deposited on Pt-coated electrode(Pt/TiN/$SiO_2$/Si) using RF sputtering method according to the deposition condition. The crystallinity of SCT thin films were increased with increase of deposition temperature in the temperature range of $100{\sim}500[^{\circ}C]$. The optimum conditions of RF power and Ar/$O_2$ ratio were 140[W] and 80/20, respectively. Deposition rate of SCT thin films was about $18.75[{\AA}/min]$ at the optimum condition. The composition of SCT thin films deposited on Si substrate is close to stoichiometry (1.081 in A/B ratio). The maximum dielectric constant of SCT thin film was obtained by annealing at $600[^{\circ}C]$.

• 센서학회지
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• 제13권1호
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• pp.66-71
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• 2004

Pt-doped zinc oxide (ZnO:Pt) films were deposited by ultrasonic spray pyrolysis. Resistivity variation with Pt concentration was measured. The Pt distribution in ZnO:Pt films was studied through Auger Electron Spectroscopy (AES). The ZnO:Pt films were annealed in the ambient of air, water vapor and ozone, respectively. The variation in crystallographic properties and surface morphologies with respect to the annealing condition was observed by X-Ray Diffraction (XRD) and Scanning Electron Microscopy (SEM). The resistivity variation of the films with the annealing condition was measured. Finally, Atomic Force Microscopy (AFM) measurements were carried out to study the effects of the annealing on the roughness of ZnO:Pt films.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 하계학술대회 논문집 C
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• pp.1483-1484
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• 2000

Dielectric thin films of PLT(Pb(La.Ti)O3) for the application of highly integrated memory devices have been deposited on Pt/Ti/SiO2/Si substrates in situ by pulsed laser deposition(PLD). We have systematically investigated the variation of grain sizes depending on the condition of post-annealing and the variation of deposition rate. Both in-situ annealing and ex-situ annealing have been compared depending on the annealing time. C-V measurement, ferroelectric properties, leakage current and SEM were performed to investigate the electrical properties and the microstructural properties of Pb(La,Ti)$O_3$ films.