• 제목/요약/키워드: and low power simulation

검색결과 2,121건 처리시간 0.031초

DRAM의 저전력, 고속화에 따른 VDC 설계에 관한 연구 (A Study on the Design of the Voltage Down Converter for Low Power, High Speed DRAM)

  • 주종두;곽승욱
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1998년도 추계종합학술대회 논문집
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    • pp.707-710
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    • 1998
  • This paper presents a new voltage down converter(VDC) for low power, high speed DRAM. This VDC Consists of RVG(Reference Voltage Generator) and Driver Circuit. And it is independent of temperature variation, and Supply Voltage. Using weak inversion region, this RVG dissipates low power. Internal Voltage Source of this VDC is stable in spite of high speed operation of memory array. This circuit is designed with a $0.65\mu\textrm{m}$ nwell CMOS technology. In HSPICE simulation results, Temperature dependency of this RVG is $20\muV/^{\circ}C,$ supply voltage dependency is $\pm0.17%,$ $VCC=3.3V\pm0.3V,$ and current dissipation is $5.22\muA.$ Internal voltage source bouncing of this VDC is smaller than conventional VDC.

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고성능 저전력 하이브리드 L2 캐시 메모리를 위한 연관사상 집합 관리 (Way-set Associative Management for Low Power Hybrid L2 Cache Memory)

  • 정보성;이정훈
    • 대한임베디드공학회논문지
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    • 제13권3호
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    • pp.125-131
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    • 2018
  • STT-RAM is attracting as a next generation Non-volatile memory for replacing cache memory with low leakage energy, high integration and memory access performance similar to SRAM. However, there is problem of write operations as the other Non_volatile memory. Hybrid cache memory using SRAM and STT-RAM is attracting attention as a cache memory structure with lowe power consumption. Despite this, reducing the leakage energy consumption by the STT-RAM is still lacking access to the Dynamic energy. In this paper, we proposed as energy management method such as a way-selection approach for hybrid L2 cache fo SRAM and STT-RAM and memory selection method of write/read operation. According to the simulation results, the proposed hybrid cache memory reduced the average energy consumption by 40% on SPEC CPU 2006, compared with SRAM cache memory.

저전압 CMOS Gm-C 연속시간 필터 설계 (The Design of Low Voltage CMOS Gm-C Continuous-Time Filter)

  • 윤창훈;정상훈;최석우
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2001년도 합동 추계학술대회 논문집 정보 및 제어부문
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    • pp.348-351
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    • 2001
  • In this paper, the Gm-C filter for low voltage and low power applications using a fully-differential transconductor is presented. The designed transconductor using the series composite transistors and the low voltage composite transistors has wide input range at low supply voltage. A negative resistor load (NRL) technology for high DC gain of the transconductor is employed with a common mode feedback(CMFB). As a design example, the third-order Elliptic lowpass filter is designed. The designed filter is simulated and examined by HSPICE using TSMC $0.35{\mu}m$ CMOS n-well parameters. The simulation results show 138kHz cutoff frequency and 11.05mW power dissipation with a 3.3V supply voltage.

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시간영역에서 파라미터 추정과 전력계통의 저주파진동 해석 (A Parameter Estimation of Time Signal and Analysis of Low Frequency Oscillation in Power Systems)

  • 심관식;남해곤;김용구
    • 대한전기학회논문지:전력기술부문A
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    • 제54권3호
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    • pp.122-132
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    • 2005
  • This paper presents a novel approach based on Prony method to analysis of small signal stability in power system. Prony method is a valuable tool in identifying transfer function and estimating the modal parameter of power system oscillation from measured or computed discrete time signal. This paper define the relative residue of time signal and propose the condition to select low frequency oscillation in each generator. This paper describes the application results of proposed algorithm with respect to KEPCO systems. Simulation results show that the proposed algorithm can be used as another tools of power systems analysis.

High-Frequency Soft-Switching PWM DC-DC Power Converter for Low Voltage Large Current Applications

  • Muraoka Hidekazu;Sakamoto Kenya;Nakaoka Mutsuo
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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    • pp.198-202
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    • 2001
  • This paper presents a novel prototype version of ZCS-PWM forward DC-DC power converter using power MOSFETs which is designed for application specific low voltage large current conversion operation. The soft-switching forward power converter with a high frequency isolated transformer link which can efficiency operate over wide load ranges under two conditions of ZCS as well as active voltage clamped switching is evaluated and discussed on the basis of the simulation and experimental results.

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저전력 CMOS 기준전류 발생회로 (A Low-Power CMOS Current Reference Circuit)

  • 김유환;권덕기;이종렬;유종근
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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    • pp.89-92
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    • 2001
  • In this paper, a simple low-power CMOS current reference circuit is proposed. The reference circuit includes parasitic pnp BJTs and resistors. Temperature compensation is made by adding a current component proportional to a thermal voltage to a current component proportional to a base-to-emitter voltage. The designed circuit has been simulated using a 0.25${\mu}{\textrm}{m}$ n-well CMOS process parameters. The simulation results show that the reference current is 34.96$mutextrm{A}$$\pm$0.04$mutextrm{A}$ in the temperature range of -2$0^{\circ}C$ to 12$0^{\circ}C$ The reference current varies less than 0.6% when the power supply voltage changes from 2.5V to 3.5V For $V_{DD=5V}$ and T=3$0^{\circ}C$ the power consumption is 520㎼ during normal operation but reduces to 0.l㎻ during power-down mode.

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자기공명영상촬영을 위한 표면경사자계코일의 저전력 설계 (Low-Power Design of the Surface Gradient Coil for Magnetic Resonance Imaging)

  • 오창현;이종권;이윤;김민기
    • 대한의용생체공학회:학술대회논문집
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    • 대한의용생체공학회 1993년도 추계학술대회
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    • pp.33-35
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    • 1993
  • A new low-power, high-order optimization scheme to design surface gradient coils (SGC) is proposed for magnetic resonance imaging (MRI). Although previous SGCs have been designed and constructed just to get strong linear gradients, this paper proposes more systematic ways of SGC design by minimizing electrical power consumption in the gradient coil and by removing unnecessary high-order field distortions in the imaging region. By assuming continuous current flow on the coil surface which may be or may not be planar, power consumption in the coil is minimized. According to the simulation results, the SGC designed by using the proposed scheme seems to produce much more uniform linear gradient field using less electrical power compared to the previously proposed SGCs.

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Low Cost and High Performance UPQC with Four-Switch Three-Phase Inverters

  • Trinh, Quoc-Nam;Lee, Hong-Hee
    • Journal of Electrical Engineering and Technology
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    • 제10권3호
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    • pp.1015-1024
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    • 2015
  • This paper introduces a low cost, high efficiency, high performance three-phase unified power quality conditioner (UPQC) by using four-switch three-phase inverters (FSTPIs) and an extra capacitor in the shunt active power filter (APF) side of the UPQC. In the proposed UPQC, both shunt and series APFs are developed by using FSTPIs so that the number of switching devices is reduced from twelve to eight devices. In addition, by inserting an additional capacitor in series with the shunt APF, the DC-link voltage in the proposed UPQC can also be greatly reduced. As a result, the system cost and power loss of the proposed UPQC is significantly minimized thanks to the use of a smaller number of power switches with a lower rating voltage without degrading the compensation performance of the UPQC. Design of passive components for the proposed UPQC to achieve a good performance is presented in detail. In addition, comparisons on power loss, overall system efficiency, compensation performance between the proposed UPQC and the traditional one are also determined in this paper. Simulation and experimental studies are performed to verify the validity of the proposed topology.

3상 계통 연계형 인버터에서의 전류 고조파 감쇄를 위한 능동형 피드포워드 보상 기법 (An Active Feedforward Compensation for a Current Harmonics Reduction in Three-phase Grid-connected Inverters)

  • 박병준;김래영;최기영
    • 전력전자학회논문지
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    • 제19권1호
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    • pp.1-7
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    • 2014
  • This paper proposes a current harmonic compensation method for the grid-connected inverter, especially caused by the grid impedance. Grid impedance causes low order harmonics in the grid current and deteriorates power quality. This paper analyzes the negative impact of the grid impedance, and proposes an active feedforward compensation method. Proposing method verified through simulation and experiment with 3-phase 1.5kW voltage source inverter prototype.

전력전자 변압기로 동작하는 저전압 직류배전 기능을 갖는 Quasi Z-소스 AC-AC 컨버터 (A Quasi Z-Source AC-AC Converter with a Low DC Voltage Distribution Capability Operating as a Power Electronic Transformer)

  • 류대현;엄준현;정영국;임영철
    • 전기학회논문지
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    • 제63권3호
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    • pp.358-366
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    • 2014
  • This paper proposes a quasi Z-source AC-AC converter with the low DC voltage distribution capability operating as a power electronic transformer. The proposed system has configuration that the input terminals of two quasi Z-source AC-AC converters are connected in parallel, also their output terminal are connected in series. Simple control method of duty ratio was proposed for the in phase buck-boost AC voltage mode and the DC output voltage control. DSP based experiment and PSIM simulation were performed. As a result, the PSIM simulation results were same with the measured results. By controlling the duty ratio under the condition of 100 [${\Omega}$] load, quasi Z-source AC-AC converter could buck and boost the AC output voltage in phase with the AC input voltage, and the same time, the constant DC voltage could be output without affecting the AC output characteristics. And, the DC output voltage 48[V] was constantly controlled in dynamic state in case while the load is suddenly changed ($50[\Omega]{\rightarrow}100[\Omega]$). From the above result, we could know that the quasi Z-source AC-AC converter can act as a power electronic transformer with a low DC voltage distribution capability.