• 제목/요약/키워드: amorphous silicon (a-Si)

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A Case Study on the Power Performance Characteristics of Building Integrated PV System with Amorphous Silicon Transparent Solar Cells (비정질 실리콘 투과형 태양전지를 적용한 BIPV 시스템 발전 성능에 관한 사례 연구)

  • Jung, Sun-Mi;Song, Jong-Hwa;Lee, Sung-Jin;Yoon, Jong-Ho
    • 한국신재생에너지학회:학술대회논문집
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    • 2009.06a
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    • pp.49-52
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    • 2009
  • Practical building integrated photovoltaic system built by Kolon E&C has been monitored and evaluated with respect to power generation, which was installed in Deokpyeong Eco Service Area in Deokpyeong, Gyeonggi, Korea. The amorphous silicon transparent PV module in this BIPV system has 44Wp in power output per unit module and 10% of transmittance with the unit dimension with $980mm{\times}950mm$. The BIPV system was applied as the skylight in the main entrance of the building. This study provided the database for the practical application of the transparent thin-film PV module for BIPV system through 11 month monitoring as well as various statistical analyses such as monthly power output and insolation. Average monthly power output of the system was 52.9kWh/kWp/month which is a 60% of power output of the previously reported data obtained under $30^{\circ}$of an inclined PV module facing south(azimuth=0). This lower power output can be explained by the installation condition of the building facing east, west and south, which was resulted from the influence of azimuth.

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Bulk and Surface Reactions of Atomic H with Crystalline Si(100)

  • 조삼근
    • Proceedings of the Korean Vacuum Society Conference
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    • 2000.02a
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    • pp.175-175
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    • 2000
  • Si(100) surfaces were exposed to gas-phase thermal-energy hydrogen atoms, H(g). We find that thermal H(g) atoms etch, amorphize, or penetrate into the crystalline silicon substrate, depending on the employed Ts range during the H(g) exposure. We find that etching is enhanced as Ts is lowered in the 300-700K range, while amorphous silicon hydride (a-Si:H) formation dominates at a Ts below 300K. This result was well explained by the fact that formation of the etching precursor, SiHx(a), and amorphization are both facilitated by a lower Ts, whereas the final step for etching, SiH3(a) + H(g) longrightarrow SiH3(g), is suppressed at a lower Ts. we also find that direct absorption of H(g) by the crystalline bulk of Si(100) substrate occurs within a narrow Ts window of 420-530K. The bulk-absorbed hydrogen evolved out molecularly from Si(100) at a Ts 80-120K higher than that for surface monohydride phase ($\beta$1) in temperature-programmed desorption. This bulk-phase H uptake increased with increasing H(g) exposure without saturation within our experimental limits. Direct absorption of H(g) into the bulk lattice occurs only when the surface is atomically roughened by surface etching. While pre-adsorbed hydrogen atoms on the surface, H(a), were readily abstracted and replaced by D(g), the H atoms previously absorbed in the crystalline bulk were also nearly all depleted, albeit at a much lower rate, by a subsequent D(g) at the peak temperature in TPD from the substrate sequentially treated with H(g) and D(g), together with a gas phase-like H2 Raman frequency of 4160cm-1, will be presented.

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A touch-sensitive display with embedded hydrogenated amorphous-silicon photodetector arrays (비정질 실리콘 광센서를 이용한 터치 감응 디스플레이 설계 및 제작)

  • Lee, Soo-Yeon;Park, Hyun-Sang;Han, Min-Koo
    • Proceedings of the KIEE Conference
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    • 2009.07a
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    • pp.1223_1224
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    • 2009
  • 광센서가 내장된 새로운 수소화된 비정질 실리콘(a-Si:H) 터치 디스플레이를 제시하였다. 16 인치 AMLCD의 모델을 구현하여 터치 패널을 성공적으로 작동시켰다. 본 시스템은 입력된 이미지로부터 실시간으로 정보를 추출해야 하는 복잡한 기존의 방식을 사용하지 않으면서 터치 포인트의 위치를 제공한다. 이 시스템의 간단한 구조를 통하여 대면적 터치 패널 디스플레이를 구현할 수 있다.

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Structure Optimization of Inverted-Staggered a-Si TFT Using a Two-Dimensional Device Simulator (이차원 소자 시뮬레이터를 이용한 역 스태거형 비정질 실리콘 박막 트랜지스터의 구조 최적화)

  • Kwak, Ji-Hoon;Choi, Jong-Sun
    • Proceedings of the KIEE Conference
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    • 1997.07d
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    • pp.1349-1351
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    • 1997
  • TFT2DS was utilized to provide the usefulness as an analytic and design tool. In this paper, the general effects of channel length of an inverted staggered amorphous silicon thin film transistor on its characteristics were investigated. The results obtained from these experiments would be adopted to the optimized device designs and advanced simulations of their electrical properties.

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The Fabrication and Electrical Characteristics of Pentacene TFT using Polyimide and Polyacryl as a Gate Dielectric Layer (Polymide와 Polyacryl을 게이트 절연층으로 이용한 pentacene TFT의 제작과 전기적 특성에 관한 연구)

  • Kim, Yun-Myoung;Kim, Ok-Byoung;Kim, Young-Kwan;Kim, Jung-Soo
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.50 no.4
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    • pp.161-168
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    • 2001
  • Organic thin film transitors(TFTs) are of interest for use in broad area electronic applications. For example, in active matrix liquid crystal displays(AMLCDs), organic TFTs would allow the use of inexpensive, light-weight, flexible, and mechanically rugged plastic substrates as an alternative to the glass substrates needed for commonly used hydrogenated amorphous silicon(a-Si:H). Recently pentacene TFTs with carrier field effect, mobility as large as 2 $cm^2V^{-1}s^{-1}$ have been reported for TFTs fabricated on silicon substrates, and it is higher than that of a-Si:H. But these TFTs are fabricated on silicon wafer and $SiO_2$ was used as a gate insulator. $SiO_2$ deposition process requires a high insulator which is polyimide and photo acryl. We investigated trasfer and output characteristics of the thin film transistors having active layer of pentacene. We calculated field effect mobility and on/off ratio from transfer characteristics of pentacene thin film transistor, and measured IR absorption spectrum of polymide used as the gate dielectric layer. It was found that using the photo acryl as a gate insulator, threshold voltage decreased from -12.5 V to -7 V, field effect mobility increased from 0.012 $cm^2V^{-1}s^{-1}$ to 0.039 $cm^2V^{-1}s^{-1}$ , and on/off current ratio increased from $10^5\;to\;10^6$. It seems that TFTs using photo acryl gate insulator is apt to form channel than TFTs using polyimide gate insulator.

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Numerical Simulation on Buffering Effects of Ultrathin p-${\mu}c$-Si:H Inserted at the p-a-SiC:H/i-a-Si:H Interface of Amorphous Silicon Solar Cells (비정질 실리콘 태양전지의 p-a-SiC:H/i-a-Si:H 계면에 삽입된 P형 미세 결정 실리콘의 완충층 효과에 대한 수치 해석)

  • Lee, Chang-Hyun;Lim, Koeng-Su
    • Solar Energy
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    • v.20 no.1
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    • pp.11-20
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    • 2000
  • To get more insight into the buffering effects of the p-${\mu}c$-Si:H Inserted at the p-a-SiC:H/i-a-Si:H interface, we present a systematic numerical simulation using Gummel-Schafetter method. The reduced recombination loss at the p/i interface due to a constant bandgap buffer is analysed in terms of the variation of the p/i Interface region with a short lifetime and the characterisitics of the buffer such as mobility bandgap, acceptor concentration, and D-state density. The numerical modeling on the constant bandgap buffer demonstrates clearly that the buffering effects of the thin p-${\mu}c$-Si:H originate from the shrinkage of highly defective region with a short lifetime in the vicinity of the p/i interface.

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a-Si:H Image Sensor for PC Scanner

  • Hur, Chang-Wu
    • Journal of information and communication convergence engineering
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    • v.5 no.2
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    • pp.116-120
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    • 2007
  • In this paper, the image sensor using the a-Si:H TFT is proposed. The optimum amorphous silicon thin film is deposited using plasma enhanced chemical vapor deposition (PECVD). TFT and photodiode both with the thin film are fabricated and form image sensor. The photodiode shows that $I_{dark}\;is\;{\sim}10^{-13}\;A,\;I_{photo}\;is\;{\sim}10^{-9}\;A\;and\;I_{photo}/I_{dark}\;is\;{\sim}10^4$, respectively. In the case of a-Si:H TFT, it indicates that $I_{on}/I_{off}\;is\;10^6$, the drain current is a few ${\mu}A\;and\;V_{th}\;is\;2{\sim}4$ volts. For the analysis on the fabricated image sensor, the reverse bias of -5 volts in ITO of photodiode and $70 {\mu}sec$ pulse in the gate of TFT are applied. The image sensor with good property was conformed through the measured photo/dark current.

Active-Matrix Field Emission Display Based on CNT Emitter and a-Si TFT

  • Song, Yoon-Ho;Kim, Kwang-Bok;Hwang, Chi-Sun;Lee, Sun-Hee;Park, Dong-Jin;Lee, Jin-Ho;Kang, Kwang-Yong;Hur, Ji-Ho;Jang, Jin
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.923-926
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    • 2004
  • Active-matrix field emission display (AMFED) based on carbon nanotube (CNT) emitter and amorphous silicon thin-film transistor (a-Si TFT) is reviewed. The AMFED pixels consisted of a high-voltage a-Si TFT and mesh-gated CNT emitters. The developed AMFED panel showed a high performance with a driving voltage of below 15 V. The low-cost and large-area AMFED approach with a metal mesh technology will be discussed.

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Low voltage stability of a-Si:H TFTs with $SiN_x$ dielectric films prepared by PECVD using Taguchi methods

  • Wu, Chuan-Yi;Sun, Kuo-Sheng;Cho, Shih-Chieh;Lin, Hong-Ming
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07a
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    • pp.272-275
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    • 2005
  • The high stability of a-Si:H TFTs device is studied with different deposited conditions of $SiN_x$ films by PECVD. The process parameters of $N_2$, $NH_3$ gas flow rate, RF power, and pressure s of hydrogenated amorphous silicon nitride are taken into account and analyzed by Taguchi experimental design method. The $NH_3$ gas flow rate and RF power are two major factors on the average threshold voltage and the a-SiNx:H film's structure. The hydrogen contents in $SiN_x$ films were measured by FTIR using the related Si-H/N-H bonds ratio in $a-SiN_x:H$ films. After the 330,000 sec gate bias stress is applied, the threshold voltages ($V_th$) shift less than 10%. This result indicates that the highly stable a-Si:H TFTs device can be fabricated with optimum gate $SiN_x$ insulator.

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Cost-effective surface passication layers by RTP and PECVD (RTP 와 PECVD을 이용한 저가의 표면 passivation 막들의 특성연구)

  • Lee, Ji-Youn;Lee, Soo-Hong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.05a
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    • pp.142-145
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    • 2004
  • In this work, we have investigated the application of rapid thermal processing (RTP) and plasma enhanced chemical vapour deposition (PECVD) for surface passivation. Rapid thermal oxidation (RTO) has sufficiently low surface recombination velocities (SRV) $S_{eff}$ in spite of a thin oxides and short process time. The effective lifetime is increasing with an increase of the oxide thickness. In the same oxide thickness, The effective lifetime is independent on the process temperature and time. $S_{eff,max}$ is exponentially decreased with increasing oxide thickness. $S_{eff,max}$ can be reduced to 200 cm/s with only 10 nm oxide thickness. On the other hand, three different types of SiN are reviewed. SiN1 layer has a thickness of about 72 nm and a refractive index of 2.8. Also, The SiN1 has a high passivation quality. The effective lifetime and SRV of 1 $\Omega$ cm Float zone (FZ) silicon deposited with SiN1 is about 800 s and under 10 cm/s, respectively. The SiN2 is optimized for the use as an antireflection layer since a refractive index of 2.3. The SiN3 is almost amorphous silicon caused by less contents of N2 from total process. The effective lifetime on the FZ 1 ${\Omega}cm$ is over 1000 ${\mu}s$.

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