• 제어로봇시스템학회:학술대회논문집
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• 1993.10a
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• pp.173-178
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• 1993

In this paper, we present an algorithmic technique for determining a feedback compensator which will stabilize the interval dynamic system, specifically, the robust regulator design for interval plants. The approach taken here is to allow the system parameters to live within prescribed intervals then design a dynamic feedback compensator which guarantees closed-loop system stable. The main contribution of this paper is the idea of introducing a "simplified Kharitonov's result" for low order polynomials to search for suitable compensator parameters in the compensator parameter space to make the uncertain syste robust. We also design the robust regulator which will D-stabilize (have the closed-loop poles in the left sector only) the dynamic interval system while having good performance. The nuerical examples are given to show the substantially improved robustness which results from our approach. approach.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.8
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• pp.64-73
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• 1994

In this paper we present an algorithmic technique for determining a feedback compensator which will stabilize the interval dynamic system specifically the robust regulator design for interval plants. The approach taken here is to allow the system parameters to live within prescribed intervals then design a dynamic feedback compensator which guarantees closed-loop system stable. The main contribution of this paper is the idea of introducting a "simplified Kharitonov`s results" for low order polynomials to search for suitable compensator parameters in the compensator parammeter space to make the uncertain system robust. We also design the robust regulator which will $D_{\phi}$ -stabilize (have the closed-loop poles in the left sector only) the dynamic interval system while having good performance. the numerical examples are given to show the substantially improved robustness which results from our approach.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.5
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• pp.1139-1144
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• 2008

In this paper, we propose an automatic generation method of transaction level(TL) model from algorithmic model to verify system specification fast and effectively using virtual platform. The TL virtual platform including structural properties such as timing, synchronization and real-time is one of the effective verification frameworks. However, whenever change system specification or HW/SW mapping, we must rebuild virtual platform and additional design/verification time is required. And the manual description is very time-consuming and error-prone process. To solve these problems, we build TL library which consists of basic components of virtual platform such as CPU, memory, timer. We developed a set of design/verification tools in order to generate a virtual platform automatically. Our tools generate a virtual platform which consists of embedded real-time operating system (RTOS) and hardware components from an algorithmic modeling. And for communication between HW and SW, memory map and device drivers are generated. The effectiveness of our proposed framework has been successfully verified with a Joint Photographic Expert Group (JPEG) and H.264 algorithm. We claim that our approach enables us to generate an application specific virtual platform $100x{\tims}1000x$ faster than manual designs. Also, we can refine an initial platform incrementally to find a better HW/SW mapping. Furthermore, application software can be concurrently designed and optimized as well as RTOS by the generated virtual platform

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.10
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• pp.67-76
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• 1993

This paper presents the design and implementation of SVSIM (Sogang VHDL SIMulator), a multi-level VHDL simulator, designed for the construction of an integrated VGDL design environment. The internal model of SVSIM is the hierarchical C/DFG which is extended from C/DFG to include the network hierarchy and local/glabal control informations. Hierarchical network is not flattened for simulation, resulting in the reduction of space complexity. The predufined/user-defined types except for the record type and the predefined/user-defined attributes are supported in SVSIM. Algorithmic-level descriptions can be siumlated by the support of recursive procedure/function calls. Input stimuli can be generated by command script in stimuli file or in VHDL source code. Experimential results show SVSIM can be efficiently used for the simulation of the pure behavioral descriptions, structural descriptions or mixture of these.

• Journal of Microbiology and Biotechnology
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• v.29 no.12
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• pp.1861-1872
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• 2019

In the present work, we isolated and identified Aspergillus sydowii NYKA 510 as the most potent laccase producer. Its medium constituents were optimized to produce the highest possible amount of laccase, which was after 7 days at 31℃ and pH 5.2. Banana peel and peptone excelled in inducing laccase production at concentrations of 15.1 and 2.60 g/l, respectively. Addition of copper sulfate elevated enzyme yield to 145%. The fungus was employed in a microbial fuel cell (MFC). The best performance was obtained at 2000 Ω achieving 0.76 V, 380 mAm^-2, 160 mWm^-2, and 0.4 W. A project to design a self-sufficient lighting unit was implemented by employing a system of 2 sets of 4 MFCs each, connected in series, for electricity generation. A scanning electron microscopy image of A. sydowii NYKA 510 was utilized in algorithmic form generation equations for the design. The mixed patterning and patterned customized mass approach were developed by the authors and chosen for application in the design.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.7
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• pp.42-48
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• 1994

In this paper, a low power and high speed flash Analog-to-Digital Converter using current-mode concept is proposed. Current-mode approach offers a number of advantages over conventional voltage-mode approach, such as lower power consumption small chip area improved accuracy etc. Rescently this concept was applied to algorithmic A/D Converter. But, its conversion speed is limited to medium speed. Consequently this converter is not applicable to the high speed signal processing system. This ADC is fabricated in 1.2um double metal CMOS standard process. This ADC's conversion time is measured to be 7MHz, and power consumption is 2.0mW, and differential nonlinearity is less than 1.14LSB and total harmonic distortion is -50dB. The active area of analog chip is about 350 x 550u$m^2$. The proposed ADC seems suitable for a single chip design of digital signal processing system required high conversion speed, high resolution small chip area and low power consumption.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.8 no.1
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• pp.75-81
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• 2008

This paper presents a top-down approach to implement an MPEG-2 audio encoder in VLSI. As the algorithm of an MPEG-2 audio encoder is heavy-weighted and heterogeneous(to be mixture of several strategies), the encoder design process is undertaken carefully from the algorithmic level to the architectural level. Firstly, the encoding algorithm is analyzed and divided into sub-algorithms, called tasks, and the tasks are partitioned in the way of reusing the same designs. Secondly, the partitioned tasks are scheduled and synthesized to make the most efficient use of time and space. In the end, a real-time 5 channel MPEG-2 audio encoder is designed which is a heterogeneous multiprocessor system; two hardwired logic blocks and one specialized DSP processor.

• Journal of Information Processing Systems
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• v.7 no.3
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• pp.397-412
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• 2011

Granular Computing has emerged as a unified and coherent framework of designing, processing, and interpretation of information granules. Information granules are formalized within various frameworks such as sets (interval mathematics), fuzzy sets, rough sets, shadowed sets, probabilities (probability density functions), to name several the most visible approaches. In spite of the apparent diversity of the existing formalisms, there are some underlying commonalities articulated in terms of the fundamentals, algorithmic developments and ensuing application domains. In this study, we introduce two pivotal concepts: a principle of justifiable granularity and a method of an optimal information allocation where information granularity is regarded as an important design asset. We show that these two concepts are relevant to various formal setups of information granularity and offer constructs supporting the design of information granules and their processing. A suite of applied studies is focused on knowledge management in which case we identify several key categories of schemes present there.

• Management Science and Financial Engineering
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• v.9 no.2
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• pp.21-45
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• 2003

Various organizational factors effect successful implementation of IT enabled business transformation. Among them, the most critical success factor is deemed to overcoming change management problem. Lots of studies have been made on implementation methodologies and business process formalizations to encourage organizational members to accept new business process changes. However, the logic of process redesign still depends on qualitative problem solving techniques mostly depending on basically human intuition such as brainstorming, cause-and-effect analysis, and so on. In this paper, we develop algorithmic procedure applicable to designing various business process changes such as process automation, business process resequencing, and more radical process integration. The framework is employed from dynamic programming approach in the literature, which is based on the decision making paradigm of organizations to abstract business processes as quantitative decision models. As such, our research can fill the gap of limited development of theory based analytic methodologies for business process design, by providing objective rationale to reach the consensus among the organizational members including senior management.

• Korean Journal of Computational Design and Engineering
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• v.14 no.1
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• pp.10-17
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• 2009

Surface detection and parameter estimation in point cloud is a relevant subject in CAD/CAM, reverse engineering, computer vision, coordinate metrology and digital factory. In this paper we present a software for a fully automatic surface detection and parameter estimation in unordered, incomplete and error-contaminated point cloud with a large number of data points. The software consists of three algorithmic modules each for object identification, point segmentation, and model fitting, which work interactively. Our newly developed algorithms for orthogonal distance fitting(ODF) play a fundamental role in each of the three modules. The ODF algorithms estimate the model parameters by minimizing the square sum of the shortest distances between the model feature and the measurement points. We demonstrate the performance of the software on a variety of point clouds generated by laser radar, computer tomography, and stripe-projection method.