• ETRI Journal
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• v.30 no.1
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• pp.158-160
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• 2008

A highly linear and efficient GaN HEMT Doherty amplifier for wideband code division multiple access (WCDMA) repeaters is presented. For better performance, the adaptive gate bias control of the peaking amplifier using the power tracking circuit and the shunt capacitors is employed. The measured one-carrier WCDMA results show an adjacent channel leakage ratio of -43.2 dBc at ${\pm}2.5$-MHz offset with a power added efficiency of 40.1% at an average output power of 37 dBm, which is a 7.5 dB back-off power from the saturated output power.

• International Journal of Control, Automation, and Systems
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• v.6 no.5
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• pp.767-775
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• 2008

Methods used for exploring marine resources and spaces include positioning a probe under water and then recalling it after a specified time. Hydro-acoustic Releasers are commonly used for positioning and retrieving of such exploration equipment. The most important factor in this kind of system is the reliability for recalling the instruments. The frequently used ultrasonic signal detection method can detect ultrasonic signals using a fixed comparator, but because of increased rates of errors due to outside interferences, information is repetitively acquired. This study presents an effective ultrasonic signal detection algorithm using the characteristics of a resonance and adaptive comparator Combined with the FSK+ASK modulator. As a result, approximately 8.8% of ultrasonic wave communication errors caused by background noise and transmission losses were reduced for effectively detecting ultrasonic waves. Furthermore, the resonance circuit's quality factor was enhanced (Q = 120 to 160). As such, the bias voltage of the transistor (Vb= 3.3 to 6.8V) was increased thereby enhancing the frequency's selectivity.

• Proceedings of the IEEK Conference
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• 2004.06a
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• pp.7-10
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• 2004

This paper describes techniques to implement low-cost adapt ive Pipelined LMS filter for ASIC implement ions of high communication receivers. Power consumpiton can be reduced using a careful selection of architectural, algorithmic, and VLSI circuit techlifue A Pipelined architecture for the strength-reduced algorithm is then developed via the relaxed look-ahead transformation. This technique, which is an approximation of the conventional look-ahead compution, maintains the functionality of the algorithm rather than the input-output behavior Convergence maiysis of the Proposed architecture has been presented and support via simulation results. The resulting pipelined adaptive filter achives a higher though put requires lower power as compared to the filter using the serial algorithm.

• Journal of the Semiconductor & Display Technology
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• v.6 no.4
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• pp.43-47
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• 2007

In this paper, we propose a novel sensor system for measuring the arterial pulse in an oral cavity. In order to measure pulse wave in oral cavity, the proposed system is designed with reflection type arterial wave sensor, not by using transmission type arterial pulse wave sensor. Driving circuit through pulse current is designed for solving self-heating problem of LED. The effectiveness of the proposed sensor system is compared with pulse wave between pulse wave of oral cavity and other body parts as well as with characteristic measurements. The experiment shows that the proposed sensor system is adaptive to capturing consecutive and meaningful biometric signals through the variation of pulse wave changes in oral cavity when exercising. The study result expects to design and develop mobile sensors which could be adapted to healthcare devices.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.58 no.2
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• pp.116-121
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• 2009

Distributed power systems (DPSs) has been widely used various industrial/military applications due to their various advantages. Furthermore, the "All electric" concept, in conjunction with DC DPS, appears to be more advanced and mature in the AEV(All-Electric Vehicular) industry. Generally, AEV carry many loads with varied functions. However, there may be large pulsed loads with short duty ratios which can affect the normal operation of other loads. In this paper, a converter with spilt capacitors and a simple adaptive controller is proposed as a active damping device to mitigate the voltage transients on the bus. The proposed converter allows the smaller capacitive storage. In addition, the proposed control approach has the advantage of requiring only one sensor and performing both the functions of mitigating the voltage bus transients and maintaining the level of energy stored. The control algorithm has been implemented on a TMS320F2812 Digital Signal Processor (DSP). Simulation and experimental results are presented which verify the proposed control principle and demonstrate the practicality of the circuit topology.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.8 no.3
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• pp.113-119
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• 1983

In this paper, a method of the step size adaption is studied on the delta modulation coding of speech signals. Exponential adaption processes are reserched by a new circuit model. It is presented a shorten error recovery in decoder step size. Practical considerations favor one algorithm, and its digital implementation has been adapted for the illustration of above method, using the rate multipliers and the validity is verified by laboratory experiment.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.127-128
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• 2006

The proposed differential LC cross-coupled VCO is implemented in InGap/GaAs HBT process for an adaptive Global Positioning system(GPS) application. Two filtering capacitors are used at the base of output buffer amplifiers at the both sides of the core m order to improve phase noise characteristics. The VCO produced a phase noise of -133 dBc/Hz at 3MHz offset frequency from the carrier frequency of 1.489GHz and the second harmonic suppression is significantly suppresed up to -49dBc/Hz in simulation result. The three pairs of BC diodes are integrated m the tank circuit to increase the VCO Tunning range.

• Proceedings of the KIEE Conference
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• 2005.05a
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• pp.239-242
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• 2005

A high speed address recovery technique for AC plasma display Panel(PDP) is proposed. By removing the GND switching operation, the recovery speed can be increased and switching loss due to GND switch also becomes to be reduced. The proposed method is able to perform load-adaptive operation by controlling the voltage level of energy recovery capacitor, which prevents increasing inefficient power consumption caused by circuit loss during recovery operation. Thus, the technique shows the minimum address power consumption according to various displayed images, different from Prior methods operating in fixed mode regardless of images. Test results with 50" HD single-scan PDP(resolution = 1366$\times$768) show that less than 350ns of recovery time is successfully accomplished and about 54% of the maximum power consumption can be reduced, tracing minimum power consumption curves.

• Journal of electromagnetic engineering and science
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• v.15 no.2
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• pp.63-75
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• 2015

The CMOS power amplifier (PA) is a promising solution for highly-integrated transmitters in a single chip. However, the implementation of PAs using the CMOS process is a major challenge because of the inferior characteristics of CMOS devices. This paper focuses on improvements to the efficiency and linearity of CMOS PAs for modern wireless communication systems incorporating high peak-to-average ratio signals. Additionally, an envelope tracking supply modulator is applied to the CMOS PA for further performance improvement. The first approach is enhancing the efficiency by waveform engineering. In the second approach, linearization using adaptive bias circuit and harmonic control for wideband signals is performed. In the third approach, a CMOS PA with dynamic auxiliary circuits is employed in an optimized envelope tracking (ET) operation. Using the proposed techniques, a fully integrated CMOS ET PA achieves competitive performance, suitable for employment in a real system.

• Proceedings of the KIEE Conference
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• 2000.07b
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• pp.1102-1104
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• 2000

Recently effective system-on-a-chip design methodology is developed, and ASIC chip design is much studied for motor control. This paper investigates the design and implementation of ASIC chip for sensorless speed control of induction motor using VHDL which is a standarded hardware description language. The sensorless control strategy is to design an adaptive state observer for flux estimation and to estimate the rotor speed from the estimated rotor flux and stator current. The presented system is implemented using a simple electronic circuit based on FPGA.