• 한국전기전자재료학회논문지
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• 제15권3호
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• pp.244-252
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• 2002

The electrical and dielectric behavior fort DC accelerated aging stress of P $r_{6}$ $O_{11}$-based Zno varistors cnsisting of ZnO-P $r_{6}$ $O_{11}$-CoO-C $r_2$ $O_3$-E $r_2$ $O_3$ were investigated with sintering temperature in the range of 1325~1345$^{\circ}C$. The varistor ceramics with increasing sintering temperature were more densified. A more densified varistors leaded to high stability for DC accelerated aging stress. Furthermore, the stability for DC accelerated aging stress was increased with the leakage current and dtan $\delta$/dV decreasing in order of 1325longrightarrow1335longrightarrow1345longrightarrow134$0^{\circ}C$ in sintering temperature. It was found that the stability for DC stress is affected more greatly by the leakage current and dtan $\delta$/dV than the densification. It is considered that the stability of varistors for DC stress can be estimated by considering the factors, such as the densification, leakage current, and dtan $\delta$/dV. As a result, the varistor sintered at 134$0^{\circ}C$ exhibited the highest stability, with %$\Delta$ $V_{lmA}$=-1.54%, %$\Delta$$\alpha$=-2.49%, %$\Delta$ $I_{\ell}$=+240.68%, 5%$\Delta$tan$\delta$=+29.96%.96%.96%.%.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
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• pp.784-789
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• 2004

Bulk ZnO varistor based on Matsuoka, which varied $SiO_2$ addition has fabricated by standard ceramic process. The micro-electrode, which fabricated for investigation on degradation property of the Single Grain Boundary of ZnO varistor, has sticked by lithography semiconductor process. The values of AC degradation has measured with 150% operating voltage in varistor threshold with 120 minute in 60Hz. In here we observed V-I and V-C property in every 30minute. The operating voltage of Single Grain Boundary has shown in variable patterns in the characteristic of V-I Property. By increasing the $SiO_2$ contents, operating value has also increased and dominated on degradation proper. In EPMA analysis, we know that added $SiO_2$ was nearly distributed at the Grain Boundary. $SiO_2$ has gradually distributed in Grain Boundary condition during the process of crystal growth. It contributes to degradation depression and decision of operating voltage. We also demonstrated for using practical application and performance on distribution random loop based on V-I Properties in Single-Grain-Boundary.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.429.2-429.2
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• 2014

ZnO nanowire is known as synthesizable and good mechanical properties. And, stimuli-responsive polymer is widely used in the application of tunable sensing device. So, we combined these characteristics to make precise tunable sensing devise. In this work, we investigate the dependence of ZnO nanowire alignment and morphology on si substrate using nanosphere template with various conditions via hydrothermal process. Also, pH-temperature dependant tuning ability of nanostructure was studied. The brief experimental scheme is as follow. First, Zno seed layer was coated on a si wafer ($20{\times}20mm$) by spin coater. And then $1.15{\mu}m$ sized close-packed PS nanospheres were formed on a cleaned si substrate by using gas-liquid-solid interfacial self-assembly method. After that, zinc oxide nanowires were synthesized using hydrothermal method. Before the wire growth, to specify the growth site, heat treatment was performed. Finally, NIPAM(N-Isopropylacrylamide) was coated onto as-fabricated nanostructure and irradiated by UV light to form the PNIPAM network. The morphology, structures and optical properties are investigated by FE-SEM(Field Emission Scanning electron Microscopy), XRD(X-ray diffraction), OM(Optical microscopy), and WCA(water contact angle).

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 추계학술대회 논문집 Vol.15
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• pp.552-556
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• 2002

The microstructure and electrical characteristics of A~C's ZnO varistors fabricated according to variable sintering condition, which sintering temperature is $1130^{\circ}C$ and speeds of pusher are A: 2mm/min, B: 4mm/min, C: 6mm/min, respectively, were investigated. In the microstructure, A~C's ZnO varist-ors fabricated variable sintering condition was consisted of ZnO grain(ZnO), spinel phase$(Zn_{2.33}Sb_{0.67}O_4)$ Bi-rich $phase(Bi_{2}O_{3})$, wholly. Varistor voltage of A~C's ZnO varistors sintered at $1130^{\circ}C$ increased in order A < B < C's ZnO varistors. C's ZnO varistor exhibited good characteristics that nonlinear exponent is 31.70. Leakage current of A~C's ZnO varistors exhibited below 2mA at rated voltage. Lightning impulse residual voltage of A's ZnO varistor suited standard characteristics, which is 3.85kV at 2.5kA, 4.4kV at 5kA and 5.16kV at 10kA. After multi lightning impulse residual voltage test of A's ZnO varistor exhibited good discharge characteristics which ZnO varistor reveals no evidence of puncture, flashover, cracking in visual examination. After high current impulse test of A's ZnO varistor exhibited good discharge characteristics, which variation rate of residual voltage is 0.4% before and after test, and revealed no evidence.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1994년도 하계학술대회 논문집 C
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• pp.1277-1279
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• 1994

In the structure of ZnO/nip-SiC: H/metal substrate amorphous silicon (a-Si:H) solar cells, the effects of inserting a rear textured ZnO in the p-SiC:H/metal interface and a graded bandgap buffer layer in the i/p-SiC:H have been analysed by computer simulation. The incident light was taken to have an intensity of $100mW/cm^2$(AM-1). The thickness of the a-Si:H n, ${\delta}$-doped a-SiC:H p, and buffer layers was assumed to be $200{\AA},\;66{\AA}$, and $80{\AA}$, respectively. The scattering coefficients of the front and back ZnO were taken to be 0.2 and 0.7, respectively. Inserting the rear buffer layer significantly increases the open circuit voltage($V_{oc}$) due to reduction of the i/p interface recombination rate. The use of textured ZnO markedly improves collection efficiency in the long wavelengths( above ${\sim}550nm$ ) by back scattering and light confinement effects, resulting in dramatic enhancement of the short circuit current density($J_{sc}$). By using the rear buffer and textured ZnO, the i-layer thickness of the ceil for obtaining the maximum efficiency becomes thinner(${\sim}2500{\AA}$). From these results, it is concluded that the use of textured ZnO and buffer layer at the backside of the ceil is very effective for enhancing the conversion efficiency and reducing the degradation of a-Si:H pin-type solar cells.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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• pp.387-387
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• 2007

기능성 나노소자를 구현할 수 있는 나노 소재로 0차원 구조의 양자점(quantum dot)과 1차원 구조의 양자선 및 나노선(nanorod)이 제안되고 있다. 나노선의 경우 나노스케일의 dimension, 앙자 제한 효과, 탁월한 결정성, self-assembly, internal stress등 기존의 벌크형 소재에서 발견할 수 없는 새로운 기능성이 나타나고 있어서 바이오, 에너지, 구조, 전자, 센서 등의 분야에서 활용되고 있다. 현재 국내외적으로 널리 연구되고 있는 나노선으로는 Si 및 Ge, $SnO_2$, SiC, ZnO 등이 있으며 특히, ZnO는 우수한 물리적 전기적 특성과 함께 나노선으로의 합성이 비교적 쉬워 주목받고 있는 재료이다. ZnO의 합성방법으로는 thermal CVD, MOCVD, PLD, wet-chemistry 등 다양한 방법이 사용되고 있다. 특히 MOCVD 법은 수직 정렬된 ZnO 나노막대를 합성하기가 매우 용이하다. 본 실험에서는 자체개발된 MOCVD 장비를 이용한 일차원 ZnO 나노선을 성장하였다. 이러한 ZnO 나노선의 성장은 사파이어 기판과 실리콘 기판 위에서 이루어졌으며 기판의 종류와 격자상수 불일도에 따른 상이한 성장과정을 온도에 따른 나노선 성장에서 관찰할 수 있었다. 사파이어 기판의 경우, 240도의 온도에서는 박막형상을 지닌 ZnO가 온도가 320도 이상으로 상승하면서 나노선으로 변함을 보였고, 실리콘 기판의 경우 380도 이상에서 기울기률 가진 나노선을 관찰하였으며, 420도에서는 나노선을 관찰 할 수 없었다. 또한 PL 장비를 이용한 PL 강도와 성장과정을 연관하여 생각하였을 때, 나노선의 기물기가 PL 강도비과 연관성을 가진다는 것을 측정을 통해 확인하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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• pp.141-142
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• 2005

To investigate the ZnO thin films which is interested in the next generation of short wavelength LEDs and Lasers, our ZnO thin films were deposited by RF sputtering system. At sputtering process of ZnO thin films, substrate temperature, work pressure respectively is $300^{\circ}C$ and 5.2 mTorr, and the purity of target is ZnO 5N. The thickness of ZnO thin films was about $1.9{\mu}m$ at SEM analysis after sputtering process. Phosphorus (P) and arsenic (As) were diffused into ZnO thin films sputtered by RF magnetron sputtering system in ampoule tube which was below $5\times10^{-7}$ Torr. The dopant sources of phosphorus and arsenic were $Zn_3P_2$ and $ZnAs_2$. Those diffusion was perform at 500, 600, and $700^{\circ}C$ during 3hr. We find the condition of p-type ZnO whose diffusion condition is $700^{\circ}C$, 3hr. Our p-type ZnO thin film has not only very high carrier concentration of above $10^{19}/cm^3$ but also low resistivity of $5\times10^{-3}{\Omega}cm$.

• 센서학회지
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• 제11권3호
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• pp.155-162
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• 2002

CO 기체 감지 특성을 향상시키기 위해서 3 mol% ZnO를 첨가한 $SnO_2$와 3mol% $SnO_2$를 첨가한 ZnO의 적층 형태를 변화시켜 연구하였다. 적층 구조는 단일층, 복층, 그리고 이종층 구조로 후막 인쇄법을 사용하여 제작하였다. $SnO_2$-ZnO계에서 제 2상은 발견되지 않았다. 전도성은 $SnO_2$에 ZnO를 첨가하면 감소하고, ZnO에 $SnO_2$를 첨가하면 증가하였다. 측정 온도증가와 CO 기체 유입으로 전도성은 증가하였다. 단층 및 복층의 후막센서 구조의 감도 향상은 없었으나, $SnO_2$ 3ZnO-ZnO $3SnO_2$/substrate 구조의 이종층 센서의 감도는 향상되었다. 센서 구조에 관계없이 I-V 변화는 모두 직선성을 나타내서 Ohmic 접합 특성을 이루고 있었다.

• 태양에너지
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• 제20권2호
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• pp.43-54
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• 2000

동시 진공증발법을 이용하여 coming glass, soda-lime glass, Mo가 증착된 soda-lime glass 위에 $Cu(In_{1-x}Ga_x)Se_2$ 박막을 증착하였다. Soda-lime glass 위에서 제조된 $Cu(In_{0.5}Ga_{0.5})Se_2$ 박막의 전기비저항값과 정공농도는Cu/(In+Ga)비에 큰 영향을 받지 않았다. Soda-lime glass위에서의 $Cu(In_{1-x}Ga_x)Se_2$ 박막내부와 표면에는 Na이 검출되었고, 표면의 Na는 산소와 결합하고 있었으며, Cu가 부족한 조성에서 이차상이 형성되었다. Ga/(In+Ga)비가 증가할수록 $Cu(In_{1-x}Ga_x)Se_2$ 박막은 회절 peak들의 큰 회절각으로 이동, 초격자 peak등의 분리, 결정립 크기의 감소가 관찰되었다. $Cu_{0.91}(In_{1-x}Ga_x)Se_2$ 박막은 Ga/(In+Ga)비에 무관하게 전기적으로 p-type을 나타내었다. Ag/n-ZnO /i-Zno/CdS/$Cu_{0.91}(In_{0.7}Ga_{0.3})Se_2$/Mo/glass구조의 태양전지를 제조하였으며, 태양전지변환효율(Eff.) = 14.48%, 단락전류밀도(Jsc) = $34.88mA/cm^2$, 개방전압(Voc) =581.5 mV, 충실도(F.F) = 0.714을 나타내었다.