Degradation Mechanism of single grain boundary in Zno Varistor

ZnO 바리스터 단입계의 열화 메카니즘

  • Kim, Jong-Ho (Wonkwang Uni. Department of Electrical, Electronic and Information Engineering Kwangwoon Uni.) ;
  • Lim, Keun-Young (Wonkwang Uni. Department of Electrical, Electronic and Information Engineering Kwangwoon Uni.) ;
  • Kim, Jin-Sa (Kwangwoon Uni. Department of Electrical Engineering) ;
  • Park, Choon-Bae (Wonkwang Uni. Department of Electrical, Electronic and Information Engineering Kwangwoon Uni.)
  • 김종호 (원광대학교 전기전자 및 정보공학부) ;
  • 임근영 (원광대학교 전기전자 및 정보공학부) ;
  • 김진사 (광운대학교 전기공학과) ;
  • 박춘배 (원광대학교 전기전자 및 정보공학부)
  • Published : 2004.07.05

Abstract

Bulk ZnO varistor based on Matsuoka, which varied $SiO_2$ addition has fabricated by standard ceramic process. The micro-electrode, which fabricated for investigation on degradation property of the Single Grain Boundary of ZnO varistor, has sticked by lithography semiconductor process. The values of AC degradation has measured with 150% operating voltage in varistor threshold with 120 minute in 60Hz. In here we observed V-I and V-C property in every 30minute. The operating voltage of Single Grain Boundary has shown in variable patterns in the characteristic of V-I Property. By increasing the $SiO_2$ contents, operating value has also increased and dominated on degradation proper. In EPMA analysis, we know that added $SiO_2$ was nearly distributed at the Grain Boundary. $SiO_2$ has gradually distributed in Grain Boundary condition during the process of crystal growth. It contributes to degradation depression and decision of operating voltage. We also demonstrated for using practical application and performance on distribution random loop based on V-I Properties in Single-Grain-Boundary.

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