• 제목/요약/키워드: ZnSnO layer

검색결과 78건 처리시간 0.029초

Investigation charge trapping properties of an amorphous In-Ga-Zn-O thin-film transistor with high-k dielectrics using atomic layer deposition

  • 김승태;조원주
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.264-264
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    • 2016
  • 최근에 charge trap flash (CTF) 기술은 절연막에 전하를 트랩과 디트랩 시킬 때 인접한 셀 간의 간섭현상을 최소화하여 오동작을 줄일 수 있으며 낸드 플래시 메모리 소자에 적용되고 있다. 낸드 플래시 메모리는 고집적화, 대용량화와 비휘발성 등의 장점으로 인해 핸드폰, USB, MP3와 컴퓨터 등에 이용되고 있다. 기존의 실리콘 기반의 플래시 메모리 소자는 좁은 밴드갭으로 인해 투명하지 않고 고온에서의 공정이 요구되는 문제점이 있다. 따라서, 이러한 문제점을 개선하기 위해 실리콘의 대체 물질로 산화물 반도체 기반의 플래시 메모리 소자들이 연구되고 있다. 산화물 반도체 기반의 플래시 메모리 소자는 넓은 밴드갭으로 인한 투명성을 가지고 있으며 저온에서 공정이 가능하여 투명하고 유연한 기판에 적용이 가능하다. 다양한 산화물 반도체 중에서 비정질 In-Ga-Zn-O (a-IGZO)는 비정질임에도 불구하고 우수한 전기적인 특성과 화학적 안정성을 갖기 때문에 많은 관심을 받고 있다. 플래시 메모리의 고집적화가 요구되면서 절연막에 high-k 물질을 atomic layer deposition (ALD) 방법으로 적용하고 있다. ALD 방법을 이용하면 우수한 계면 흡착력과 균일도를 가지는 박막을 정확한 두께로 형성할 수 있는 장점이 있다. 또한, high-k 물질을 절연막에 적용하면 높은 유전율로 인해 equivalent oxide thickness (EOT)를 줄일 수 있다. 특히, HfOx와 AlOx가 각각 trap layer와 blocking layer로 적용되면 program/erase 동작 속도를 증가시킬 수 있으며 넓은 밴드갭으로 인해 전하손실을 크게 줄일 수 있다. 따라서 본 연구에서는 ALD 방법으로 AlOx와 HfOx를 게이트 절연막으로 적용한 a-IGZO 기반의 thin-film transistor (TFT) 플래시 메모리 소자를 제작하여 메모리 특성을 평가하였다. 제작 방법으로는, p-Si 기판 위에 열성장을 통한 100 nm 두께의 SiO2를 형성한 뒤, 채널 형성을 위해 RF sputter를 이용하여 70 nm 두께의 a-IGZO를 증착하였다. 이후에 소스와 드레인 전극에는 150 nm 두께의 In-Sn-O (ITO)를 RF sputter를 이용하여 증착하였고, ALD 방법을 이용하여 tunnel layer에 AlOx 5 nm, trap layer에 HfOx 20 nm, blocking layer에 AlOx 30 nm를 증착하였다. 최종적으로, 상부 게이트 전극을 형성하기 위해 electron beam evaporator를 이용하여 platinum (Pt) 150 nm를 증착하였고, 계면 결함을 최소화하기 위해 퍼니스에서 질소 가스 분위기, $400^{\circ}C$, 30 분의 조건으로 열처리를 했다. 측정 결과, 103 번의 program/erase를 반복한 endurance와 104 초 동안의 retention 측정으로부터 큰 열화 없이 메모리 특성이 유지되는 것을 확인하였다. 결과적으로, high-k 물질과 산화물 반도체는 고성능과 고집적화가 요구되는 향후 플래시 메모리의 핵심적인 물질이 될 것으로 기대된다.

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Gamma ray exposure buildup factor and shielding features for some binary alloys using MCNP-5 simulation code

  • Rammah, Y.S.;Mahmoud, K.A.;Mohammed, Faras Q.;Sayyed, M.I.;Tashlykov, O.L.;El-Mallawany, R.
    • Nuclear Engineering and Technology
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    • 제53권8호
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    • pp.2661-2668
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    • 2021
  • Gamma radiation shielding features for three series of binary alloys identified as (Pb-Sn), (Pb-Zn), and (Zn-Sn) have been investigated. The mass attenuation coefficients (µ/ρ) for the selected alloys were simulated using the MCNP-5 code in the energy range between 0.01 and 15 MeV. Moreover, the (µ/ρ) values were computed using WinXCOM database in the same energy range to validate the simulation results. Results reveal a good agreement between the simulated and computed values. The half value layer (HVL), mean free path (MFP), effective atomic number (Zeff) and exposure buildup factor (EBF) were evaluated for the selected binary alloys. Results showed that the PS1, PZ1, and ZS2 alloys have the best shielding parameters and better than the commercially standard and available radiation shielding materials. Therefore, the investigated alloys can be used as effective radiation shielding materials against gamma ray with energies between 0.01 and 15 MeV.

Characteristics and Fabrication of ZTO/Ag/ ZTO Multilayer Transparent Conducting Electrode

  • Cho, Se-Hee;Yang, Jeong-Do;Wei, Chang-Hwan;Pandeyd, Rina;Byun, Dong-Jin;Choia, Won-Kook
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.339-339
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    • 2013
  • We study on the optical and electrical properties of indium-free ZTO(ZnSnO)/Ag/ZTO (ZAZ) multilayer electrodes for the low-cost transparent electrode. In the first step, each single layer was deposited using rf magnetron in-line sputter with various working pressure based on $O_2$/$Ar+O_2$ ratio (0~3%) and power at room temperature. Secondly, we studied the optical and electrical properties by analyzing the refractive index, extinction coefficient, transmittance and resistivity of each layer. Finally, we optimized the thickness of each layer using macleod simulation program based on the analyzed optical properties and fabricated the multilayer electrode. As a result, We achieved a low sheet resistance of $11{\Omega}$/sq and anaverage transmittance of 80% in the visible region of light (380~780 nm). This indicates that indium-free ZAZ multilayer electrode is a promising low-cost and low-temperature processing electrode scheme.

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Microscopic characterization of pretransition oxide formed on Zr-Nb-Sn alloy under various Zn and dissolved hydrogen concentrations

  • Kim, Sungyu;Kim, Taeho;Kim, Ji Hyun;Bahn, Chi Bum
    • Nuclear Engineering and Technology
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    • 제50권3호
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    • pp.416-424
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    • 2018
  • Microstructure of oxide formed on Zr-Nb-Sn tube sample was intensively examined by scanning transmission electron microscopy after exposure to simulated primary water chemistry conditions of various concentrations of Zn (0 or 30 ppb) and dissolved hydrogen ($H_2$) (30 or 50 cc/kg) for various durations without applying desirable heat flux. Microstructural analysis indicated that there was no noticeable change in the microstructure of the oxide corresponding to water chemistry changes within the test duration of 100 days (pretransition stage) and no significant difference in the overall thickness of the oxide layer. Equiaxed grains with nano-size pores along the grain boundaries and microcracks were dominant near the water/oxide interface, regardless of water chemistry conditions. As the metal/oxide interface was approached, the number of pores tended to decrease. However, there was no significant effect of $H_2$ concentration between 30 cc/kg and 50 cc/kg on the corrosion of the oxide after free immersion in water at $360^{\circ}C$. The adsorption of Zn on the cladding surface was observed by X-ray photoelectron spectroscopy and detected as ZnO on the outer oxide surface. From the perspective of $OH^-$ ion diffusion and porosity formation, the absence of noticeable effects was discussed further.

Enhanced Electrical Performance of SiZnSnO Thin Film Transistor with Thin Metal Layer

  • Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • 제18권3호
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    • pp.141-143
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    • 2017
  • Novel structured thin film transistors (TFTs) of amorphous silicon zinc tin oxide (a-SZTO) were designed and fabricated with a thin metal layer between the source and drain electrodes. A SZTO channel was annealed at $500^{\circ}C$. A Ti/Au electrode was used on the SZTO channel. Metals are deposited between the source and drain in this novel structured TFTs. The mobility of the was improved from $14.77cm^2/Vs$ to $35.59cm^2/Vs$ simply by adopting the novel structure without changing any other processing parameters, such as annealing condition, sputtering power or processing pressure. In addition, stability was improved under the positive bias thermal stress and negative bias thermal stress applied to the novel structured TFTs. Finally, this novel structured TFT was observed to be less affected by back-channel effect.

GaN 단결정에 의해 제조된 $Ga_2O_3$ 나노물질의 구조 (The structure of $Ga_2O_3$ nanomaterials synthesized by the GaN single crystal)

  • 박상언;조채룡;김종필;정세영
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2003년도 추계학술발표강연 및 논문개요집
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    • pp.120-120
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    • 2003
  • The metallic oxide nanomaterials including ZnO, Ga$_2$O$_3$, TiO$_2$, and SnO$_2$ have been synthesized by a number of methods including laser ablation, arc discharge, thermal annealing procedure, catalytic growth processes, and vapor transport. We have been interested in preparing the nanomaterials of Ga$_2$O$_3$, which is a wide band gap semiconductor (E$_{g}$ =4.9 eV) and used as insulating oxide layer for all gallium-based semiconductor. Ga$_2$O$_3$ is stable at high temperature and a transparent oxide, which has potential application in optoelectronic devices. The Ga$_2$O$_3$ nanoparticles and nanobelts were produced using GaN single crystals, which were grown by flux method inside SUS$^{TM}$ cell using a Na flux and exhibit plate-like morphologies with 4 ~ 5 mm in size. In these experiments, the conventional electric furnace was used. GaN single crystals were pulverized in form of powder for the growth of Ga$_2$O$_3$ nanomaterials. The structure, morphology and composition of the products were studied mainly by X-ray diffraction (XRD), field emission scanning electron microscopy (FESEM), and high-resolution transmission electron microscopy (HRTEM).).

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Effect of Sputtering Power on the Change of Total Interfacial Trap States of SiZnSnO Thin Film Transistor

  • Ko, Kyung-Min;Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • 제15권6호
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    • pp.328-332
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    • 2014
  • Thin film transistors (TFTs) with an amorphous silicon zinc tin oxide (a-2SZTO) channel layer have been fabricated using an RF magnetron sputtering system. The effect of the change of excitation electron on the variation of the total interfacial trap states of a-2SZTO systems was investigated depending on sputtering power, since the interfacial state could be changed by changing sputtering power. It is well known that Si can effectively reduce the generation of the oxygen vacancies. However, The a-2SZTO systems of ZTO doped with 2 wt% Si could be degraded because the Si peripheral electron belonging to a p-orbital affects the amorphous zinc tin oxide (a-ZTO) TFTs of the s-orbital overlap structure. We fabricated amorphous 2 wt% Si-doped ZnSnO (a-2SZTO) TFTs using an RF magnetron sputtering system. The a-2SZTO TFTs show an improvement of the electrical property with increasing power. The a-2SZTO TFTs fabricated at a power of 30 W showed many of the total interfacial trap states. The a-2SZTO TFTs at a power of 30 W showed poor electrical property. However, at 50 W power, the total interfacial trap states showed improvement. In addition, the improved total interfacial states affected the thermal stress of a-2SZTO TFTs. Therefore, a-2SZTO TFTs fabricated at 50 W power showed a relatively small shift of threshold voltage. Similarly, the activation energy of a-2SZTO TFTs fabricated at 50 W power exhibits a relatively large falling rate (0.0475 eV/V) with a relatively high activation energy, which means that the a-2SZTO TFTs fabricated at 50 W power has a relatively lower trap density than other power cases. As a result, the electrical characteristics of a-2SZTO TFTs fabricated at a sputtering power of 50 W are enhanced. The TFTs fabricated by rf sputter should be carefully optimized to provide better stability for a-2SZTO in terms of the sputtering power, which is closely related to the interfacial trap states.

열처리 온도 및 시간에 따른 ZTO TFT의 특성 변화

  • 한창훈;김동수;최병덕
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제41회 하계 정기 학술대회 초록집
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    • pp.341-341
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    • 2011
  • 최근 AMOLED 구동이 가능한 소자에 대한 연구가 활발히 진행중이다. AMOLED구동 가능소자는 LTPS TFT, a-Si TFT, OTFT, Oxide TFT가 있으며 그 중에서 현재 대부분 LTPS TFT를 사용하고 있다. LTPS TFT는 높은 전자 이동도와 안정성을 가지고 있기 때문에 현재 각광 받는 AMOLED에 잘 맞는다. 하지만 LTPS TFT는 고비용, 250$^{\circ}C$ 이상의 공정온도, Substrate가 Glass, Metal로 제한 된다는 문제점이 있으며, 균일성이 낮고 현재 대면적 기술이 부족한 상태이다. 해결방안으로 AMOLED를 타겟으로 하는 Oxide TFT 기술이 떠오르고 있다. Oxide TFT는 이동도가 높고 저온공정이 가능하며 Substrate로 Plastic 기판을 사용할 수가 있어 차후에 Flexible 소자로서의 적용이 가능하다. 또한 기존의 진공장비 사용대신 용액공정이 가능하여 장비사용시간 및 절차를 단축시킬 수 있어 비용적인 유리함을 가지고 있다. Oxide TFT는 단결정 산화물과 다결정 복합 산화물 두 가지 범주를 가지고 있다. Oxide TFT의 재료물질은 ZnO, ZTO, IZO, SnO2, Ga2O3, IGO, In2O3, ITO, InGaO3(ZnO)5, a-IGZO이 있다. 본 연구에서는 산화물질 중 하나인 ZTO를 이용하여 TFT 소자를 제작하였다. 산화물 특성상 열처리 온도에 따라 형성되는 결정의 정도가 다르기 때문에 온도 및 시간 변수에 따른 ZTO의 특성변화에 초점을 맞추어 연구함으로서 최적화된 조건을 찾고자 실험을 진행하였다. 실험을 위한 기판으로 n-type wafer을 사용하였다. PE-CVD 장비를 이용하여 SiNx를 120 nm 증착하고, ZTO 용액을 spin-coating을 이용하여 channel layer을 형성하였다. 균일하게 형성된 ZTO의 결정을 위하여 200$^{\circ}C$, 300$^{\circ}C$, 400$^{\circ}C$, 500$^{\circ}C$에서 1시간, 3시간, 6시간, 10시간의 온도 및 시간 변수를 두어 공기 중에서 열처리 하였다. ZTO는 약 30 nm 두께로 형성되었다. Thermal evaporator를 이용하여 Source, Drain의 알루미늄 전극을 형성하고, wafer 뒷면에는 Silver paste를 이용하여 Gate전극을 만들었다. 제작된 소자를 dark room temperature에서 측정하였다.

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Investigating InSnZnO as an Active Layer for Non-volatile Memory Devices and Increasing Memory Window by Utilizing Silicon-rich SiOx for Charge Storage Layer

  • Park, Heejun;Nguyen, Cam Phu Thi;Raja, Jayapal;Jang, Kyungsoo;Jung, Junhee;Yi, Junsin
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.324-326
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    • 2016
  • In this study, we have investigated indium tin zinc oxide (ITZO) as an active channel for non-volatile memory (NVM) devices. The electrical and memory characteristics of NVM devices using multi-stack gate insulator SiO2/SiOx/SiOxNy (OOxOy) with Si-rich SiOx for charge storage layer were also reported. The transmittance of ITZO films reached over 85%. Besides, ITZO-based NVM devices showed good electrical properties such as high field effect mobility of 25.8 cm2/V.s, low threshold voltage of 0.75 V, low subthreshold slope of 0.23 V/dec and high on-off current ratio of $1.25{\times}107$. The transmission Fourier Transform Infrared spectroscopy of SiOx charge storage layer with the richest silicon content showed an assignment at peaks around 2000-2300 cm-1. It indicates that many silicon phases and defect sources exist in the matrix of the SiOx films. In addition, the characteristics of NVM device showed a retention exceeding 97% of threshold voltage shift after 104 s and greater than 94% after 10 years with low operating voltage of +11 V at only 1 ms programming duration time. Therefore, the NVM fabricated by high transparent ITZO active layer and OOxOy memory stack has been applied for the flexible memory system.

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실리콘산화아연주석 산화물 반도체의 후열처리 온도변화에 따른 트랜지스터의 전기적 특성 연구 (Electrical Performance of Amorphous SiZnSnO TFTs Depending on Annealing Temperature)

  • 이상렬
    • 한국전기전자재료학회논문지
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    • 제25권9호
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    • pp.677-680
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    • 2012
  • The dependency of annealing temperature on the electrical performances in amorphous silicon-zinc-tin-oxide thin film transistors (SZTO-TFT) has been investigated. The SZTO channel layers were prepared by using radio frequency (RF) magnetron sputtering method with different annealing treatment. The field effect mobility (${\mu}_{FE}$) increased and threshold voltage ($V_{th}$) shifted to negative direction with increasing annealing temperature. As a result, oxygen vacancies generated in SZTO channel layer with increasing annealing temperature resulted in negative shift in $V_{th}$ and increase in on-current.