• ETRI Journal
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• v.27 no.5
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• pp.569-578
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• 2005

The purpose of this paper is to describe the implementation of monolithically matching circuits, interface circuits, and RF core circuits to the same substrate. We designed and fabricated on-chip 1 to 6 GHz up-conversion and 1 to 8 GHz down-conversion mixers using a 0.8 mm SiGe hetero-junction bipolar transistor (HBT) process technology. To fabricate a SiGe HBT, we used a reduced pressure chemical vapor deposition (RPCVD) system to grow a base epitaxial layer, and we adopted local oxidation of silicon (LOCOS) isolation to separate the device terminals. An up-conversion mixer was implemented on-chip using an intermediate frequency (IF) matching circuit, local oscillator (LO)/radio frequency (RF) wideband matching circuits, LO/IF input balun circuits, and an RF output balun circuit. The measured results of the fabricated up-conversion mixer show a positive power conversion gain from 1 to 6 GHz and a bandwidth of about 4.5 GHz. Also, the down-conversion mixer was implemented on-chip using LO/RF wideband matching circuits, LO/RF input balun circuits, and an IF output balun circuit. The measured results of the fabricated down-conversion mixer show a positive power conversion gain from 1 to 8 GHz and a bandwidth of about 4.5 GHz.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.5
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• pp.470-475
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• 2015

This paper presents a wideband Current-Reused Voltage Controlled Oscillator (VCO) with 2-Step Automatic Amplitude Calibration (AAC). Tuning range of the proposed VCO is from 1.95 GHz to 3.15 GHz. The mismatch of differential voltage is within 0.6 %. At 2.423 GHz, the phase noise is -116.3 dBc/Hz at the 1 MHz offset frequency with the current consumption of 2.6 mA. The VCO is implemented $0.13{\mu}m$ CMOS technology. The layout size is $720{\times}580{\mu}m^2$.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.8 no.4
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• pp.46-52
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• 2009

In this paper, a novel VCO (Voltage Controlled Oscillator) structure is proposed to achieve the characteristic of low phase noise and a wide frequency tuning range. The proposed scheme adopts an impedance transforming technique to change a series resonance into a parallel resonance for maximizing the susceptance slope parameter. The manufactured VCO shows a frequency tuning bandwidth of 600MHz from 10.1GHz to 10.7GHz with a tuning voltage varying from 0 to 9V, an excellent phase noise below -119dBc/Hz@1MHz offset. The harmonic suppression is measured above 28dB.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.6
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• pp.556-561
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• 2013

Interest in spin-torque oscillators (STOs) has been increasing due to their potential use in communication devices. In particular the magnetic tunnel junction-based STO (MTJ-STO) with high perpendicular anisotropy is gaining attention since it can generate high output power. In this paper, a circuit-level model for an in-plane magnetized MTJ-STO with partial perpendicular anisotropy is proposed. The model includes the perpendicular torque and the shift field for more accurate modeling. The bias voltage dependence of perpendicular torque is represented as quadratic. The model is written in Verilog-A, and simulated using HSPICE simulator with a current-mirror circuit and a multi-stage wideband amplifier. The simulation results show the proposed model can accurately replicate the experimental data such that the power increases and the frequency decreases as the value of the perpendicular anisotropy gets close to the value of the demagnetizing field.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.2A
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• pp.96-101
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• 2003

This paper is on the user equipment (UE) side time tracker design and implementation of the wideband code division multiple access (WCDMA) system. The time tracker is constructed as a second order closed loop including time error detector (TED), loop filter (LP), numerically controlled oscillator (NCO), and sample selector (SS). Through the simulation, we found the gain of the TED as a function of the CPICH power contribution to the total transmission power of the base station. Also we derived the transfer function of the loop and the BER versus DPCH power relationships where timing offsets and loop noise bandwidths are used as parameters. In the curve, we can conclude that there are appropriate loop noise bandwidths according to the given environments for the better performance.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.2
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• pp.115-122
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• 2016

In this paper, wideband Ku-band downconverter was designed to receiver digital satellite broadcasting. The low-nose downconverter was designed to form four local oscillator frequencies(9.75, 10, 10.75 and 11.3 GHz) representing a low phase noise due to VCO-PLL with respect to input signals of 10.7 to 12.75 GHz and 3-stage low noise amplifier circuit by broadband noise matching, and to select intermediate frequency bands by digital control. The developed low-noise downconverter exhibited the full conversion gain of 64 dB, and the noise figure of low-noise amplifier was 0.7 dB, the P1dB of output signal 15 dBm, and the phase noise -85 dBc@10kHz at the band 1 carrier frequency of 9.75 GHz. The low noise block downconverter(LNB) for wideband digital satellite broadcasting designed in this paper can be used for global satellite broadcasting LNB.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.941-944
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• 2015

In this paper study for VSAT(very small aperture terminal) LNB(low noise block). ship LNB was demanded high stability and low noise figure. We designed FEM(Front-End Module) that was operated multi-band. FEM designed was constructed in a multi-band low noise receiver amplifier, a frequency converter, IF amplifier, Voltage Control Oscillator signal generating circuit four circuit using. To convert the multi-band 2.05GHz band, it generates four local oscillator signals, the four(band1, band2, band3, band4) designed to output an IF signal developed conversion apparatus, the conversion gain 64dB, noise figure 1dB or less, output P1dB 15dBm or more, phase noise showed -73dBc@100Hz.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.6C
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• pp.561-570
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• 2009

Ultra-wideband communication systems based on impulse radio have merits that are possible for the high data rate transmission, high resolution ranging are positioning system. Conventionally, in order to accomplish these features, the high-speed ADC (Analog to Digital Convertor) is necessary to apply radio determination system operating in time domain. However, considering low rate - wireless personal area network (LR-WPAN) aims to low-cost hardware implementation, the expensive ADC converting GHz sampling per second is not appropriate. So, this paper introduces a low complex AR (Auto Regressive) model based non-coherent ranging scheme operating in frequency domain with using low-speed ADC utilizing analog Voltage Control Oscillator (VCO) mode for the frequency domain transformation. To verify the superiority of the proposed ranging and location algorithm working in frequency domain, the suggested IEEE 802.15.4a TG channel model is used to exploit affirmative features of the proposed algorithm with conducting the simulation results.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.7
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• pp.7-15
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• 2002

The digital DBS tuner is designed and implemented in a CMOS process using a direct-conversion architecture that offers a high degree of integration. To generate mathched LO I/Q quadrature signals covering the total input frequency range, a fully integrated ring oscillator is employed. And, to decrease a high level of phase noise of the ring oscillator, a frequency synthesizer is designed using a double loop strucure. This paper proposes and verifies a band selective loop for fast frequency switching time of the double loop frequency synthesizer. The down-conversion mixer with source follower input stages is used for low voltage operation. An experiment implementation of the frequency synthesizer and mixer with integrated a 0.25um CMOS process achieves a switching time of 600us when frequency changes from 950 to 2150MHz. And, the experiment results show a quadrature amplitude mismatch of max. 0.06dB and a quadrature phase mismathc of max. >$3.4^{\circ}$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.6 no.1
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• pp.38-44
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• 1981

This paper is for the design and construction of TV translator using in the areas where TV signal is not detectible. In this paper, theoretical design method and the scheme to decrease the intermodulation occurred by the harmonics of local oscillator are proposed. In the processes of design we have known that intermodulation of wideband IF amplifier is cannot avoidable when only single IF band is used for all the TV channels As the input vs output characteristics of TV trasnlator we have obtained the constant output signal level of +30 dBm for the input signal levels of -76dBm~-26dBm. And in the 6MHz passband, more than 95% of linearity is obtained.