• Title/Summary/Keyword: Voltage mismatch

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Design of a 2.5GHz Quadrature LC VCO with an I/Q Mismatch Compensator (I/Q 오차 보정 회로를 갖는 2.5GHz Quadrature LC VCO 설계)

  • Byun, Sang-Jin;Shim, Jae-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.2
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    • pp.35-43
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    • 2011
  • In this paper, an analysis on I/Q mismatch characteristics of a quadrature LC VCO(Voltage controlled oscillator) is presented. Based on this analysis, a new I/Q mismatch compensator is proposed. The proposed I/Q mismatch compensator utilizes an amplitude mismatch detector rather than the conventional phase mismatch detector requiring much more wide frequency bandwidth. To verify the proposed circuit, a 2.5GHz quadrature LC VCO was designed in a $0.18{\mu}m$ CMOS process and tested. Test results show that an amplitude mismatch detector achieves similar I/Q mismatch compensation performance as that of the conventional phase mismatch detector. The I/Q mismatch compensator consumes 0.4mA from 1.8V supply voltage and occupies $0.04mm^2$.

Diagnosis Method of PV Module Mismatch using Voltage and Current Waveforms (태양광 모듈의 전압 및 전류 파형을 이용한 부정합 진단 기법)

  • Ahn, Hee-Wook;Park, Gi-Yob
    • Journal of the Korean Solar Energy Society
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    • v.31 no.3
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    • pp.17-22
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    • 2011
  • Techniques for mismatch loss minimization to increase the PV system efficiency are under development recently. In this paper, a method to make diagnosis of PV module mismatch is presented, which uses a concept of operating point factor. The method is based on the fact that the ratio of the incremental conductance of a PV module to instantaneous conductance is 1 when the module is operating at its maximum power point. The variations of module voltage and current are taking place by the maximum power point tracker in the power conditioning units of PV system. The effectiveness of the method is verified through an application to a real PV system.

Compensation of PV Module Current for Reduction of Mismatch Losses in PV Systems (태양광 시스템의 부정합 손실 저감을 위한 모듈 전류 보상 기법)

  • Ahn, Hee-Wook;Park, Gi-Yob
    • Journal of the Korean Solar Energy Society
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    • v.32 no.3
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    • pp.26-32
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    • 2012
  • A current compensation method to reduce the mismatch loss in PV systems is proposed as a way to increase the power generation efficiency. A dc-dc converter is used to supply currents to irregular modules in a PV string and is powered from the string output. The converter's voltage conversion ratio is adjusted so that all the modules in the string are operated at the maximum power point. The power rating and size of the converter can be reduced since only the current difference between the regular and irregular module may be supplied. The compensated string shows very little voltage mismatch compared to other regular strings. The validity of the proposed method is verified through a simulation and experiments in a prototype PV system.

A Study On The Voltage transfer compensator for solving mismatch of oldage PV module string (노후 태양광모듈 스트링의 부정합 해소를 위한 전압보상기에 관한 연구)

  • Na, Jeong-Seong;Song, Gwang-Cheol
    • Journal of the Korean Society of Industry Convergence
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    • v.21 no.2
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    • pp.71-78
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    • 2018
  • In this paper, we propose the performance enhancement of solar individual string power generation system using booster power control for voltage compensation. The proposed control method determines the variable voltage for the compensator using direct power control (DPC) modeling applied to motion factor estimation. This method also maintains excellent dynamic response to the characteristics of direct power control (DPC) by calculating the mismatch ratio of the arrestered PV modules. The validity of the proposed algorithm is verified through simulation and experiments.

Characteristics variation of PV module by damaged bypass diodes

  • Sin, U-Gyun;Jeong, Tae-Hui;Go, Seok-Hwan;Gang, Gi-Hwan;Jang, Hyo-Sik
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.424.2-424.2
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    • 2016
  • Solar cell converts light energy to electric energy. But a solar cell generates low power, PV module is fabricated by connected in series with dozens of solar cell. Owing to solar cell connected in series, power of PV module is influenced by shading or mismatch power of solar cells. To prevent power loss of PV module by shading or mismatch current, Bypass diodes are installed in PV module. Bypass diode operating reverse voltage by shading or mismatch power of solar cells bypass mismatch current. However, bypass diode in module exposed outdoor is easily damaged by surge voltage. In this paper, we confirm characteristics variation of PV module with damaged bypass diode. As a result, power of PV module with damaged bypass diode is reduced and Temperature of that is increased.

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Gain and Phase Mismatch Calibration Technique in Image-Reject RF Receiver

  • Lee, Mi-Young;Yoo, Chang-Sik
    • Journal of electromagnetic engineering and science
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    • v.10 no.1
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    • pp.25-27
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    • 2010
  • This paper presents a gain and phase mismatch calibration technique for an image-reject RF receiver. The gain mismatch is calibrated by directly measuring the output signal amplitudes of two signal paths. The phase mismatch is calibrated by measuring the output amplitude of the final IF output at the image band. The calibration of the gain and phase mismatch is performed at power-up, and the normal operation of the RF receiver does not interfere with the mismatch calibration circuit. To verify the proposed technique, a 2.4-GHz Weaver image-reject receiver with the gain and phase mismatch calibration circuit is implemented in a 0.18-${\mu}m$ CMOS technology. The overall receiver achieves a voltage gain of 45 dB and a noise figure of 4.8 dB. The image rejection ratio(IRR) is improved from 31 dB to 59.76 dB even with 1 dB and $5^{\circ}$ mismatch in gain and phase, respectively.

Design of Low voltage High speed Phase Locked Loop (고속 저전압 위상 동기 루프(PLL) 설계)

  • Hwang, In-Ho;Cho, Sang-Bock
    • Proceedings of the KIEE Conference
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    • 2007.04a
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    • pp.267-269
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    • 2007
  • PLL(Phase Locked Loop) are widely used circuit technique in modern electronic systems. In this paper, We propose the low voltage and high speed PLL. We design the PFD(Phase Frequency Detector) by using TSPC (True Single Phase Clock) circuit to improve the performance and solve the dead-zone problem. We use CP(Charge Pump} and LP(Loop filter) for Negative feedback and current reusing in order to solve current mismatch and switch mismatch problem. The VCO(Voltage controlled Oscillator) with 5-stage differential ring oscillator is used to exact output frequency. The divider is implemented by using D-type flip flops asynchronous dividing. The frequency divider has a constant division ratio 32. The frequency range of VCO has from 200MHz to 1.1GHz and have 1.7GHz/v of voltage gain. The proposed PLL is designed by using 0.18um CMOS processor with 1.8V supply voltage. Oscillator's input frequency is 25MHz, VCO output frequency is 800MHz and lock time is 5us. It is evaluated by using cadence spectra RF tools.

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Electric Circuit Analysis for PV Array on Short-Circuit Failure of Bypass Diode in PV Module (PV모듈의 바이패스 다이오드 단락 고장 시 태양광어레이 회로 특성분석)

  • Lee, Chung-Geun;Shin, Woo-Gyun;Lim, Jong Rok;Hwang, Hye-Mi;Ju, Young-Chul;Jung, Young-Seok;Kang, Gi-Hwan;Chang, Hyo-Sik;Ko, Suk-Whan
    • Journal of the Korean Solar Energy Society
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    • v.39 no.6
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    • pp.15-25
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    • 2019
  • As the installation of photovoltaic systems increases, fire accidents of PV system grow every year. Most of PV system fires have been reported to be caused by electrical components. The majority of fire accidents occurred in combiner box, which is presumed to be short-circuit accidents due to dustproof and waterproof failures or heat deterioration of blocking diode. For this reason, the blocking diode installation became optional by revised PV combiner regulation. In this paper, according to the revised regulation, reverse current that generated by voltage mismatch was measured and analyzed in PV array without a blocking diode. The factors that cause voltage mismatch in array are assumed to be shaded PV module and short circuit failure of bypass diode. As the result of experiment, there is no reverse current to flow under shading condition in module, but reverse current flows on the failure of bypass diode in module. According to the module's I-V characteristic curve analysis, open voltage was slightly reduced due to operation of bypass diode in shading. However, it showed that open circuit voltage has decreased significantly in the failure of bypass diode. This indicates that the difference in open voltage reduction of voltage mismatch factor causes reverse current to flow.

New Charge Pump for Reducing the Current Mismatch (전류 부정합을 줄인 새로운 전하 펌프)

  • Lee, Jae-Hwan;Jeong, Hang-Geun
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.469-471
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    • 2008
  • The charge pump affects the performance of PLL. In designing the charge pump, we need to consider various issues such as current mismatch, charge sharing, feedthrough, charge injection, and leakage current. This paper propose the new charge pump circuit which is improved in terms of the current match over the existing high-speed charge pump. The simple method used for reducing current mismatch is the technique that uses a cascode in order to increase the output resistance of the charge pump. However the method limits the output voltage range of the charge pump. So the method is hard to apply as the supply voltage is lowered. Thus this paper proposes a new charge pump circuit using an op amp instead of the cascode. And the new charge pump circuit has an excellent current matching characteristics over a wide output range.

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A Feed-forward Method for Reducing Current Mismatch in Charge Pumps (전하 펌프의 전류 부정합 감소를 위한 피드포워드 방식)

  • Lee, Jae-Hwan;Jeong, Hang-Geun
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.46 no.1
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    • pp.63-67
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    • 2009
  • Current mismatch in a charge pump causes degradation in spectral purity of the phase locked loops(PLLs), such as reference spurs. The current mismatch can be reduced by increasing the output resistance of the charge pump, as in a cascoded output stage. However as the supply voltage is lowered, it is hard to stack transistors. In this paper, a new method for reducing the current mismatch is proposed. The proposed method is based on a feed-forward compensation for the channel length modulation effect of the output stage. The new method has been demonstrated through simulations on typical $0.18{\mu}m$ CMOS circuits.