• 대한전자공학회논문지SD
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• 제48권2호
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• pp.35-43
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• 2011

본 논문에서는 Quadrature LC VCO(Voltage controlled oscillator)의 I/Q 오차를 분석하고, 그 분석된 결과를 이용하여 I/Q 오차 보정 회로를 제안한다. 제안된 I/Q 오차 보정 회로는 높은 주파수 대역폭을 요구하는 위상 오차 검출기를 사용하는 대신에 낮은 주파수 대역폭으로도 동작이 가능한 진폭 오차 검출기를 사용한다. 제안된 I/Q 오차 보정 회로의 검증을 위하여 2.5GHz Quadrature LC VCO가 $0.18{\mu}m$ CMOS 공정으로 제작 및 측정되었다. 측정결과 제안된 진폭 오차 검출기를 사용해도 기존의 위상 오차 검출기는 사용하는 경우들과 유사한 I/Q 오차 보정 성능을 얻을 수 있음을 확인하였다. 본 I/Q 오차 보정 회로는 1.8V 전원 전압에서 0.4mA 전류를 소모하며, 차지하는 칩 면적은 $0.04mm^2$이다.

• 한국태양에너지학회 논문집
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• 제31권3호
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• pp.17-22
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• 2011

Techniques for mismatch loss minimization to increase the PV system efficiency are under development recently. In this paper, a method to make diagnosis of PV module mismatch is presented, which uses a concept of operating point factor. The method is based on the fact that the ratio of the incremental conductance of a PV module to instantaneous conductance is 1 when the module is operating at its maximum power point. The variations of module voltage and current are taking place by the maximum power point tracker in the power conditioning units of PV system. The effectiveness of the method is verified through an application to a real PV system.

• 한국태양에너지학회 논문집
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• 제32권3호
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• pp.26-32
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• 2012

A current compensation method to reduce the mismatch loss in PV systems is proposed as a way to increase the power generation efficiency. A dc-dc converter is used to supply currents to irregular modules in a PV string and is powered from the string output. The converter's voltage conversion ratio is adjusted so that all the modules in the string are operated at the maximum power point. The power rating and size of the converter can be reduced since only the current difference between the regular and irregular module may be supplied. The compensated string shows very little voltage mismatch compared to other regular strings. The validity of the proposed method is verified through a simulation and experiments in a prototype PV system.

• 한국산업융합학회 논문집
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• 제21권2호
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• pp.71-78
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• 2018

In this paper, we propose the performance enhancement of solar individual string power generation system using booster power control for voltage compensation. The proposed control method determines the variable voltage for the compensator using direct power control (DPC) modeling applied to motion factor estimation. This method also maintains excellent dynamic response to the characteristics of direct power control (DPC) by calculating the mismatch ratio of the arrestered PV modules. The validity of the proposed algorithm is verified through simulation and experiments.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.424.2-424.2
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• 2016

Solar cell converts light energy to electric energy. But a solar cell generates low power, PV module is fabricated by connected in series with dozens of solar cell. Owing to solar cell connected in series, power of PV module is influenced by shading or mismatch power of solar cells. To prevent power loss of PV module by shading or mismatch current, Bypass diodes are installed in PV module. Bypass diode operating reverse voltage by shading or mismatch power of solar cells bypass mismatch current. However, bypass diode in module exposed outdoor is easily damaged by surge voltage. In this paper, we confirm characteristics variation of PV module with damaged bypass diode. As a result, power of PV module with damaged bypass diode is reduced and Temperature of that is increased.

• Journal of electromagnetic engineering and science
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• 제10권1호
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• pp.25-27
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• 2010

This paper presents a gain and phase mismatch calibration technique for an image-reject RF receiver. The gain mismatch is calibrated by directly measuring the output signal amplitudes of two signal paths. The phase mismatch is calibrated by measuring the output amplitude of the final IF output at the image band. The calibration of the gain and phase mismatch is performed at power-up, and the normal operation of the RF receiver does not interfere with the mismatch calibration circuit. To verify the proposed technique, a 2.4-GHz Weaver image-reject receiver with the gain and phase mismatch calibration circuit is implemented in a 0.18-${\mu}m$ CMOS technology. The overall receiver achieves a voltage gain of 45 dB and a noise figure of 4.8 dB. The image rejection ratio(IRR) is improved from 31 dB to 59.76 dB even with 1 dB and $5^{\circ}$ mismatch in gain and phase, respectively.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 심포지엄 논문집 정보 및 제어부문
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• pp.267-269
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• 2007

PLL(Phase Locked Loop) are widely used circuit technique in modern electronic systems. In this paper, We propose the low voltage and high speed PLL. We design the PFD(Phase Frequency Detector) by using TSPC (True Single Phase Clock) circuit to improve the performance and solve the dead-zone problem. We use CP(Charge Pump} and LP(Loop filter) for Negative feedback and current reusing in order to solve current mismatch and switch mismatch problem. The VCO(Voltage controlled Oscillator) with 5-stage differential ring oscillator is used to exact output frequency. The divider is implemented by using D-type flip flops asynchronous dividing. The frequency divider has a constant division ratio 32. The frequency range of VCO has from 200MHz to 1.1GHz and have 1.7GHz/v of voltage gain. The proposed PLL is designed by using 0.18um CMOS processor with 1.8V supply voltage. Oscillator's input frequency is 25MHz, VCO output frequency is 800MHz and lock time is 5us. It is evaluated by using cadence spectra RF tools.

• 한국태양에너지학회 논문집
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• 제39권6호
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• pp.15-25
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• 2019

As the installation of photovoltaic systems increases, fire accidents of PV system grow every year. Most of PV system fires have been reported to be caused by electrical components. The majority of fire accidents occurred in combiner box, which is presumed to be short-circuit accidents due to dustproof and waterproof failures or heat deterioration of blocking diode. For this reason, the blocking diode installation became optional by revised PV combiner regulation. In this paper, according to the revised regulation, reverse current that generated by voltage mismatch was measured and analyzed in PV array without a blocking diode. The factors that cause voltage mismatch in array are assumed to be shaded PV module and short circuit failure of bypass diode. As the result of experiment, there is no reverse current to flow under shading condition in module, but reverse current flows on the failure of bypass diode in module. According to the module's I-V characteristic curve analysis, open voltage was slightly reduced due to operation of bypass diode in shading. However, it showed that open circuit voltage has decreased significantly in the failure of bypass diode. This indicates that the difference in open voltage reduction of voltage mismatch factor causes reverse current to flow.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.469-471
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• 2008

전하 펌프는 위상 고정 루프의 성능에 영향을 준다. 전하 펌프 설계에 있어서 전류 부정합, 전하 공유, 전하 주입, 누설 전류 등을 고려할 필요가 있다. 본 논문에서는 기존의 고속 전하 펌프의 전류 정합성을 개선한 새로운 전하 펌프 회로를 제안하였다. 전류 부정합을 줄이기 위해 주로 사용되는 간단한 방법으로는 캐스코드를 이용하여 전하 펌프의 출력 저항을 증가시키는 방법이 있다. 그러나 캐스코드 방법을 사용하면 전하펌프의 출력 범위에 제약을 받게 되므로 전원 전압이 낮아짐에 따라 적용하기가 힘들어진다는 단점이 있다. 따라서 본 논문에서는 캐스코드를 적용하지 않고 연산증폭기를 사용하여 전하펌프의 출력 범위 전체에서 우수한 전류 정합 특성을 갖는 회로를 제안하였다.

• 전자공학회논문지SC
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• 제46권1호
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• pp.63-67
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• 2009

전하 펌프의 전류 부정합은 위상 고정 루프의 주파수 성분에 기준 스퍼를 발생시킴으로써 특성을 떨어뜨리게 한다. 전류 부정합은 캐스코드 출력단과 같이 전하 펌프의 출력 저항을 높여줌으로써 감소시킬 수 있다. 그러나 공급 전압이 낮아짐에 따라 트랜지스터를 쌓기 힘들어지게 된다. 본 논문에서는 전류 부정합을 줄이기 위한 새로운 방법을 제안하였다. 제안한 방법은 출력 단의 채널 길이 변조에 의한 전류 변화를 피드포워드 방식으로 보상해 주는 것이다. 새로운 방법에 대한 시뮬레이션은 CMOS $0.18{\mu}m$ 공정을 이용하였다.