• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.647-650
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• 2005

In this paper, a low voltage SRAM using double boosting scheme is described. A low supply voltage deteriorates the static noise margin (SNM) and the cell read-out current. For read/write operation, a selected word line and cell VDD bias are boosted in a different level using double boosting scheme. This increases not only the static noise margin but also the cell readout current at a low supply voltage. A low voltage SRAM with 32K ${\times}$ 8bit implemented in a 0.18um CMOS technology shows an access time of 26.1ns at 0.8V supply voltage.

• 한국정보통신학회논문지
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• 제9권2호
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• pp.301-306
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• 2005

본 논문에서는 gain-boosting 회로를 이용하여 전류 미스매치를 줄일 수 있는 전하펌프와 전압제어 저항기를 사용하여 선형성이 우수한 래치 구조의 전압제어발생기를 제안하여 위상고정루프를 설계하였다. Cain-boosting 전하펌프를 사용한 위상고정루프는 루프필터 출력 전압 구간에서 11$mu$V(최대 43$mu$V, 최소 32$mu$V)의 전압 흔들림 차이를 나타내었다. 전압제어저항기를 이용한 전압제어발진기는 입력전압 동작 구간에서 우수한 선형성을 나타내었다. 또한 제작된 전압제어발진기의 위상 잡음 특성은 -1084Bc/Hz(a)100kHz이며 CMOS 공정으로 만들어진 LC 전압제어발진기와 비슷한 성능을 가진다. 0.35$mu$m CMOS 공정으로 시뮬레이션 하였으며 록킹 시간은 150$mu$s이다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2008년도 하계학술대회 논문집
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• pp.265-267
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• 2008

As generally recognized, the driving performance of a SRM at higher speed will be degraded due to the effects of back electromagnetic force (EMF). This phenomenon can be improved via voltage boosting. So in this paper an improved converter of enhancing the performance for four-phase switched reluctance motor (SRM) is proposed. By using one additional capacitor and switches, an extra controllable boosted voltage can be produced during the rise and fall periods of a motor phase current. Then this active boosted voltage can reduce the effect of EMF on the current, particularly at high speeds. The attractive features of the proposed converter are as follows: obtaining boosted voltage to improve performance of SRM with same numbers of switch and diode as asymmetric converter, having higher control flexibility and capability of boosting voltage compared with passive boosting converters, possessing lower cost and simple control in comparison with existing active boosting converters. The performances of the proposed circuit are verified by the simulation and experiment results.

• 전자공학회논문지
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• 제54권2호
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• pp.53-57
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• 2017

본 논문에서는 의료 기기용 401MHz - 406MHz MedRadio 대역에서 사용하는 저잡음 증폭기를 제안한다. 제안한 저잡음 증폭기는 전류 재사용 gm-boosting 기술을 이용한 공통 게이트 증폭기 구조를 채택하여 기존의 gm-boosted 공통 게이트 증폭기에 비해 동일한 전력소모에서 더 높은 전압 이득과 더 낮은 잡음 지수 특성을 얻었다. 제안한 전류 재사용 gm-boosted 저잡음 증폭기는 $0.13{\mu}m$ CMOS 공정을 사용하여 설계하였고, 22 dB의 전압 이득, 2.95 dB의 잡음 지수, -17 dBm의 IIP3 특성을 보이며, 공급 전압 0.5 V에서 $170{\mu}W$의 전력을 소비한다.

• Journal of Power Electronics
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• 제17권5호
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• pp.1173-1185
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• 2017

In this paper, a new single phase multilevel inverter topology with a single DC source is presented. The proposed topology is developed based on the concepts of the L-Z source inverter and the switched capacitor multilevel inverter. The input voltage to the proposed inverter is boosted by two steps: the first step by an impedance network and the second step by switched capacitor units. Compared to other existing topologies, the presented topology can produce a higher boosted multilevel output voltage while using a smaller number of components. In addition, it provides more flexibility to control boosting factor, size, cost and complexity of the inverter. The proposed inverter possesses all the advantages of the L-Z source inverter and the switched capacitor multilevel inverter like controlling the start-up inrush current and capacitor voltage balancing using a simple switching strategy. The operating principle and general expression for the different parameters of the proposed topology are presented in detail. A phase disposition pulse width modulation strategy has been developed to switch the inverter. The effectiveness of the topology is verified by extensive simulation and experimental studies on a 7-level inverter structure.

• 반도체디스플레이기술학회지
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• 제7권2호
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• pp.7-12
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• 2008

This paper proposed DC-DC converter for fuel cell that have high voltage and high current output characteristics. It is required step-up converter to use by general power supply, because the general rated voltage of fuel cell is low about 20$\sim$50V. The miniaturization of converter and DC link voltage can be controlled and high quality of output voltage uses mainly DC-DC converter. The boost converter and buck-boost converter do not get high boosting ratio. It is that proposed boost-flyback converter. Through simulation and an experiment, it could get high boosting ratio and efficiency more than 90%.

• Journal of Electrical Engineering and Technology
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• 제12권3호
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• pp.1203-1210
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• 2017

Switched-inductor (SL) Z-source three-level inverter is a novel high power topology. The SL based impedance network can boost the input dc voltage to a higher value than the single LC impedance network. However, as all the neutral-point-clamped (NPC) inverters, the SL Z-source three-level inverter has to balance the neutral-point (NP) potential too. The principle of the inverter is introduced and then the effects of NP potential unbalance are analyzed. A NP balancing method is proposed. Other than the methods for conventional NPC inverter without Z-source impedance network, the upper and lower shoot-through durations are corrected by the feedforward compensation factors. With the proposed method, the NP potential is balanced and the voltage boosting ability of the Z-source network is not affected obviously. Simulations are conducted to verify the proposed method.

• Journal of Power Electronics
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• 제18권2호
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• pp.432-444
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• 2018

This paper presents a capacitor voltage balancing topology using a three-level boost converter (TLBC) for a neutral point clamped (NPC) three-level inverter fed surface permanent magnet synchronous motor drive (SPMSM). It enhanced the performance of the drive in terms of its voltage THD and torque pulsation. The main attracting feature of the proposed control is the boosting of the input voltage and at the same time the balancing of the capacitor voltages. This control also reduces the computational complexity. For the purpose of close loop vector control, a software based cost effective resolver to digital converter RDC-less estimation is implemented to calculate the speed and position. The proposed drive is simulated in the MATLAB/SIMULINK environment and an experimental investigation using dSPACE DS1104 validates the proposed drive system at different operating condition.

• 전기학회논문지
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• 제57권7호
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• pp.1254-1259
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• 2008

A new CMOS current-mode integrator for low-voltage analog integrated circuit design is presented. The proposed current-mode integrator is based on cross-coupled gain-boosting topology. When it is compared with that of the typical current-mirror type current-mode integrator, the proposed current-mode integrator achieves high current gain and unity gain frequency with the same transistor size. As a application circuit of the proposed integrator, we designed the 1.8V 200MHz band current-mode lowpass filter. These are verified by Hspice simulation using $0.18{\mu}m$ CMOS technology.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2010년도 추계학술대회
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• pp.196-197
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• 2010

In same cases of grid connected system using photovoltaic modules, high boosting ratio is required for the converters. Four topologies based on conventional boost converters are implemented according to the voltage doubler and cascade methods. The topologies are analyzed and compared according to its boosting ratio and configurations. Consequently, the suitability of four topologies for MIC application is considered by simulation results.