• Journal of Power Electronics
• /
• 제17권1호
• /
• pp.31-40
• /
• 2017

A novel voltage-fed single-stage power factor correction (PFC) full-bridge converter based on asymmetric phase-shifted control for battery chargers is proposed in this paper. The attractive feature of the proposed converter is that it can operate in a wide output voltage range without an output low-frequency ripple, which is indispensable in battery charger applications. Meanwhile, the converter can maintain a high power factor and a controllable dc bus voltage over a wide output voltage range. In this paper, the realization of PFC and the operation principle of asymmetric phase-shifted control are given. A small-signal analysis of the proposed single-stage power factor correction (PFC) full-bridge converter is performed. Experimental results obtained from a 1kW experimental prototype are given to validate the feasibility of the proposed converter. The PF is higher than 0.97 over the entire output voltage range with the proposed control strategy.

• 대한전자공학회논문지SD
• /
• 제41권7호
• /
• pp.89-96
• /
• 2004

넓은 범위의 전압-제어 발진기 및 자동 이득 조절기의 실현을 위한 고선형 전압-제어 전류원(VCCS) 회로를 제안하였다. 제안한 VCCS는 전압 입력을 위해 이미터 폴로워, 전류 출력을 위해 이미터가 결합된 두 개의 공통-베이스 증폭기, 그리고 넓은 범위의 전류 출력과 높은 선형성을 얻기 위해 두 증폭기를 결합한 전류 미러로 구성된다. VCCS의 회로는 별도의 바이어스회로가 없이 단지 5개의 트랜지스터와 1개의 저항기만 사용하였다. 시뮬레이션 결과 제안한 VCCS는 5V의 공급전압에서 1V에서 4.8V까지의 제어-전압에 대하여 최대 0A에서 300㎃까지의 전류를 출력할 수 있다. 0㎃에서 300㎃의 출력 전류의 최대 선형 오차는 1.4 %이였다.

• 제어로봇시스템학회논문지
• /
• 제19권3호
• /
• pp.195-201
• /
• 2013

In this paper, we present optimization technique for the response time of DVR (Dynamic Voltage Restorer) and the possible compensation range of voltage dip by the DVR system. To protect 3-phase phase-controlled rectifier from voltage dip, DVR system needs to have optimum response time as an important design factor. Although the fast response time of DVR ensures wider range of voltage dip, DVR controller has so high cost and poor stability. This paper proposes DVR system with optimum response time required for certain intensity of voltage dips and good stability to support possible compensation range of voltage dip. Proposed technique showed optimum response time and good stability for overall system. We believe that proposed technique is reliable and useful in DVR design.

• Journal of Power Electronics
• /
• 제10권2호
• /
• pp.115-124
• /
• 2010

In this paper, a simple yet efficient auto mode-hop ripple control structure for buck converters with light load operation enhancement is proposed. The converter, which operates under a wide range of input and output voltages, makes use of a state-dependent hysteretic comparator. Depending on the output current, the converter automatically changes the operating mode. This improves the efficiency and reduces the output voltage ripple for a wide range of output currents for given input and output voltages. The sensitivity of the output voltage to the circuit elements is less than 14%, which is seven times lower than that for conventional converters. To assess the efficiency of the proposed converter, it is designed and implemented with commercially available components. The converter provides an output voltage in the range of 0.9V to 31V for load currents of up to 3A when the input voltage is in the range of 5V to 32V. Analytical design expressions which model the operation of the converter are also presented. This circuit can be implemented easily in a single chip with an external inductor and capacitor for both fixed and variable output voltage applications.

• Experimental Neurobiology
• /
• 제26권5호
• /
• pp.241-251
• /
• 2017

Saturation mutagenesis was performed on a single position in the voltage-sensing domain (VSD) of a genetically encoded voltage indicator (GEVI). The VSD consists of four transmembrane helixes designated S1-S4. The V220 position located near the plasma membrane/extracellular interface had previously been shown to affect the voltage range of the optical signal. Introduction of polar amino acids at this position reduced the voltage-dependent optical signal of the GEVI. Negatively charged amino acids slightly reduced the optical signal by 33 percent while positively charge amino acids at this position reduced the optical signal by 80%. Surprisingly, the range of V220D was similar to that of V220K with shifted optical responses towards negative potentials. In contrast, the V220E mutant mirrored the responses of the V220R mutation suggesting that the length of the side chain plays in role in determining the voltage range of the GEVI. Charged mutations at the 219 position all behaved similarly slightly shifting the optical response to more negative potentials. Charged mutations to the 221 position behaved erratically suggesting interactions with the plasma membrane and/or other amino acids in the VSD. Introduction of bulky amino acids at the V220 position increased the range of the optical response to include hyperpolarizing signals. Combining The V220W mutant with the R217Q mutation resulted in a probe that reduced the depolarizing signal and enhanced the hyperpolarizing signal which may lead to GEVIs that only report neuronal inhibition.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2005년도 추계종합학술대회
• /
• pp.587-590
• /
• 2005

We investigated the input impedance characteristics of UHF-band RFID tag chip for increased reading range. A voltage multiplier designed using 0.4 ${\mu}m$ $zero-V_T$ MOSFET showed that DC output voltage of 2 V can be obtained using standard CMOS process. The input impedance of the voltage multiplier was examined to achieve impedance level for maximum reading distance using analytical and numerical approaches. The input impedance of the voltage multiplier could be varied in a wide range by selecting the size of MOSFET and the number of multiplying stages of the voltage multiplier, and thus, the impedance level required for the tag antenna can be obtained in presence of other tag circuit blocks.

• 전력전자학회논문지
• /
• 제24권1호
• /
• pp.66-69
• /
• 2019

This study proposes a high-efficiency phase-shifted full-bridge (PSFB) converter with a wide input voltage range. The conventional PSFB converter is a useful topology in high-power applications. This converter not only achieves the zero-voltage switching of the primary switches, but also has small RMS current in the primary side. However, because the conventional PSFB converter has large freewheeling current in the primary side when it is designed considering the hold-up time of the converter, such a converter has high conduction loss at the primary switches. To solve this problem, a new PSFB converter is proposed in this study. The experiment is implemented with an input voltage ranging from a 320 V-400 V and an output power specification of 715 W.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
• /
• pp.85-88
• /
• 2003

In this Paper, we report the experimental results of the Forward-flyback U-U converter with current doubler and synchronous rectifier. The experimental converter, that has a output voltage 3.3V, output current 20A, maximum power of 66W, switching frequency of 290kHz and input voltage range of 36-75V, has been successfully implemented. As a result, in the entire voltage range the measured full load efficiency was above 85$\%$, and the output voltage was regulated at 3.3V within $\pm3{\%}$ tolerance.

• 대한전기학회논문지:전기물성ㆍ응용부문C
• /
• 제52권10호
• /
• pp.425-430
• /
• 2003

A CMOS Voltage-Controlled Oscillator(VCO) for application at temperature stable system is designed. The VCO consists of bandgap voltage reference circuit, comparator, and voltage-to-current converter and the VCO has a temperature stable characteristics. The difference between simulated and calculated values is less than about 5% in output characteristics when the input voltage range is from 1V to 3.25V. The CMOS VCO has error less than about $\pm$0.85% in the temperature range from $-25^{\circ}C$ to $75^{\circ}C$.

• 대한전자공학회논문지SD
• /
• 제45권3호
• /
• pp.54-59
• /
• 2008

본 논문에서는 광범위 출력전압을 위한 고정밀 BiCMOS cascode 전류미러를 제안하였다. 제안한 전류미러는 베이스 전류에러를 보상하는 BJT 전류미러를 기본으로 하고 있다. NMOS-NMOS cascode 구조 대신에 npn-NMOS cascode 구조를 사용하여, 출력저항과 출력전압 범위를 증가시켰다. npn 전류 복사 트랜지스터는 입력전류를 출력전류로 복사하고, NMOS 트랜지스터는 출력저항을 증가시켜 정밀한 전류 복사를 가능케 한다. 제안한 전류미러는 광범위 출력전압에서 정밀하게 전류를 복사한다. 5V/16V 0.5um BCD 공정을 이용하여 제작한 칩을 측정하여 검증하였고, $0.3V{\sim}16V$의 출력전압 범위에서 전류 에러는 $-2.5%{\sim}1.0%$이다.