• Asia-Pacific Journal of Business
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• v.14 no.1
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• pp.341-350
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• 2023

Purpose - How are gains from trade distributed between countries when economic integration is achieved through free trade? The purpose of this paper is to answer this question. Design/methodology/approach - This study attempts to address the issue of distribution of trade gains between participating countries following economic integration in terms of positive economics. The analysis is therefore based on a theoretical methodology. Findings - First, commodity prices fall and consumer surplus increases in both large and small countries. Second, when economic integration into free trade is achieved, gains from trade always exist in small countries. However, the size of trade gains depends on the degree of difference from the market size of the partner country, the large country. However, the size of the gains from trade depends on the extent of difference between the market size of the large country. If the market size of a large country is much larger and there is a large difference, trade gains will be very large, whereas if the market size is similar, profits of domestic firm will decrease. Therefore, in that case, the size of the gains from trade becomes relatively small because only the gains from exchange exists. On the other hand, in a large country with a large market size, there is a possibility of trade gains only when the market size is similar to that of a small country, which is a trading partner. However, if there is a large difference in market size, the decrease in profits of domestic firm is relatively larger than the increase in consumer surplus due to trade, and rather, a trade loss occurs. Research implications or Originality - Our analysis contributes to filling the gaps in the literature regarding the distribution of gains from trade, and from a policy point of view, it is meaningful in examining the impact of market size, an important variable considered in regional economic integration of countries.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.10
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• pp.1553-1571
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• 1993

A significant amount of research has focused on the development of highly parallel architectures to obtain far more computational power than conventional computer systems. These architectures usually comprise of a large number of processors communicating through an interconnection network. The VLSI (Very Large Scale Integration) and WSI (Wafer Scale Integration) cellular arrays form one important class of those parallel architectures, and consist of a large number of simple processing cells, all on a single chip or wafer, each interconnected only to its neighbors. This paper studies three fundamental issues in these arrays : fault-tolerant reconfiguration. functional reconfiguration, and their integration. The paper examines conventional techniques, and gives an in-depth discussion about fault-tolerant reconfiguration and functional reconfiguration, presenting testing control strategy, configuration control strategy, steps required f4r each reconfiguration, and other relevant topics. The issue of integrating fault tolerant reconfiguration and functional reconfiguration has been addressed only recently. To tackle that problem, the paper identifies the relation between fault tolerant reconfiguration and functional reconfiguration, and discusses appropriate testing and configuration control strategy for integrated reconfiguration on VLSI and WSI cellular arrays.

• Structural Engineering and Mechanics
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• v.15 no.2
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• pp.199-223
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• 2003

The formulation of a non-linear shear deformable shell element is presented for the solution of stability problems of stiffened plates and shells. The formulation of the geometrical stiffness presented here is exactly defined on the midsurface and is efficient for analyzing stability problems of thick plates and shells by incorporating bending moment and transverse shear resultant force. As a result of the explicit integration of the tangent stiffness matrix, this formulation is computationally very efficient in incremental nonlinear analysis. The element is free of both membrane and shear locking behaviour by using the assumed strain method such that the element performs very well in the thin shells. By using six degrees of freedom per node, the present element can model stiffened plate and shell structures. The formulation includes large displacement effects and elasto-plastic material behaviour. The material is assumed to be isotropic and elasto-plastic obeying Von Mises's yield condition and its associated flow rules. The results showed good agreement with references and computational efficiency.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.16 no.6
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• pp.94-102
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• 2007

Applications of bonded dissimilar materials such as large scale integration (LSI) packages, ceramics/metal and resin/metal bonded joints, are very increasing in various industry fields. It is very important to analyze the thermal stress and stress singularity at interface edge in LSI. In order to investigate stress singularities on the bonded interface edges and delamination of die pad and resin in the IC package. In this paper, stress singularity factors(${\Gamma}_i$) and stress intensity factors($K_i$) considering thermal stress in the IC package were analyzed by using the 2-dimensional elastic boundary element method(BEM).

• Journal of the Korea Society for Simulation
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• v.18 no.4
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• pp.59-66
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• 2009

This has been possible by integration techniques such as very large scale integration (VLSI) and wafer scale integration (WSI). Redundancy has been extensively used for manufacturing memory chips and to provide repair of these devices in the presence of faulty cells. If there are too many defects, the momory has to be rejected. But if there are a few defects, it will be more efficient and cost reducing for the company to use it by repairing. Therefore, laser-repair process is nedded for such a reason and redundancy analysis is needed to establish correct target of laser-repair process. The proposed CRA (Correlation Repair Algorithm) simulation, beyond the idea of the conventional redundancy analysis algorithm, aims at reducing the time spent in the process and strengthening cost competitiveness by performing redundancy analysis after simulating each case of defect.

• International Journal of Quality Innovation
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• v.3 no.2
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• pp.93-112
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• 2002

The issues of “Integration” in quality management and related fields have been discussed for a few years. Literature review reveals that this is a large and multi-disciplinary topic. Although there are many publications on this issue, very few well-cited articles show direct illustration to why, what and how to implement the “Integration” strategy in quality management. This paper presents a panoramic review and vision on “Integration” issues of quality management, in the perspectives of concept, scope, organization, information, process, and culture.

• Journal of Communications and Networks
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• v.11 no.1
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• pp.20-25
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• 2009

The maximum likelihood detection with QR decomposition and M-algorithm (QRM-MLD) has been presented as a suboptimum multiple-input multiple-output (MIMO) detection scheme which can provide almost the same performance as the optimum maximum likelihood (ML) MIMO detection scheme but with the reduced complexity. However, due to the lack of parallelism and the regularity in the decoding structure, the conventional QRM-MLD which uses the tree-structure still has very high complexity for the very large scale integration (VLSI) implementation. In this paper, we modify the tree-structure of conventional QRM-MLD into trellis-structure in order to obtain high operational parallelism and regularity and then apply the Viterbi algorithm to the QRM-MLD to ease the burden of the VLSI implementation.We show from our selected numerical examples that, by using the QRM-MLD with our proposed trellis-structure, we can reduce the complexity significantly compared to the tree-structure based QRM-MLD while the performance degradation of our proposed scheme is negligible.

• The Southeast Asian review
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• v.21 no.3
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• pp.139-203
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• 2011

This paper attempts to review of recent development of ASEAN financial integration and to evaluate it and predict its future aspect. For this purpose, we first examine the historic aspect of ASEAN financial integration such as ASEAN financial service open agreement or ASEAN capital market forum report and currently agreed integration plan. In addition, we study the development stages of ASEAM member countries in terms of its economic size or income level. Finally, we look at the financial market and institutional aspect of ASEAN member countries and the recent development of global financial market. From these analyses, we find several important facts. First, it is true that ASEAN, in general, will enjoy the effect of expanding regional investment and improving the quality of financial service through the financial integration. We think that its long term benefit is too large for ASEAN member states to avoid. Second, as a result, it is certain that ASEAN will corporate further to make its financial market to be integrated in the future. Third, however, despite these benefits and continuing efforts, we expect that it will be very difficult for ASEAN to reach a stage of financial integration as suggested in the Blueprint of ASEAN Economic Community by the year of 2015. The large difference among member states in term of economic and financial development will not allow for them to reach a single goal within a short time. Instead, we expect the following scenario for the integration process will hold. First, ASEAN will reach an agreement on the institutional framework by 2015 and afterwards, slowly the markets will begin to integrate. Second, at the earlier stage, not all but some countries will start the integration process. We expect that the financial market of ASEAN 5 will first be integrated and other 5 will join to it later.

• ETRI Journal
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• v.32 no.3
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• pp.380-389
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• 2010

This paper presents a new edge-protection algorithm and its very large scale integration (VLSI) architecture for block artifact reduction. Unlike previous approaches using block classification, our algorithm utilizes pixel classification to categorize each pixel into one of two classes, namely smooth region and edge region, which are described by the edge-protection maps. Based on these maps, a two-step adaptive filter which includes offset filtering and edge-preserving filtering is used to remove block artifacts. A pipelined VLSI architecture of the proposed deblocking algorithm for HD video processing is also presented in this paper. A memory-reduced architecture for a block buffer is used to optimize memory usage. The architecture of the proposed deblocking filter is verified on FPGA Cyclone II and implemented using the ANAM 0.25 ${\mu}m$ CMOS cell library. Our experimental results show that our proposed algorithm effectively reduces block artifacts while preserving the details. The PSNR performance of our algorithm using pixel classification is better than that of previous algorithms using block classification.

• Korean Journal of Computational Design and Engineering
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• v.13 no.6
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• pp.412-420
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• 2008

In order to design the large complex structures like VLFS (Very Large Floating Structures), it is essential the cooperation between the experts in various fields; structural engineering expert, fluid mechanics expert, mooring system engineer, and so on. This paper describes the development of an integrated system to support the cooperative design between various experts and project manager. This integrated system is designed to be operated in Web environment and it contains the support of design DB and 3D graphical tool, negotiation tool for task allocation, and various engineering supporting tools for each design step. The user group of this system can be classified as Project Manager, Engineering Expert, DB Builder, and System Administrator. All of the engineering data is saved after and during the process of the design projects and all participants can be connected by Internet without the limit of time or space constraints.