• Journal of Platform Technology
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• v.10 no.4
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• pp.62-69
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• 2022

Flight control systems installed on unmanned aircraft require thorough verification from the design stage. This verification is made through the integrated flight control test environment. Typically, a debugger is used to monitor the internal state of a flight control computer in real time. Emulator with a real-time memory monitor and trace is relatively expensive. The JTAG Emulator is unable to operate in real time and has limitations that cannot be caught up with the processing speed of latest high-speed processors. In this paper, we describe the results of the development of internal monitoring software for drone flight control computer processors based on NUTTX/PIXHAWK. The results of this study show that the functions provided compared to commercial debugger are limited, but it can be sufficiently used to verify the flight control system using this system under limited budget.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.18 no.8
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• pp.2366-2380
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• 2024

In this study, a high-speed template matching system is proposed for wafer-vision alignment. The proposed system is designed to rapidly locate markers in semiconductor equipment used for wafer-vision alignment. We optimized and implemented a template-matching algorithm for the high-speed processing of high-resolution wafer images. Owing to the simplicity of wafer markers, we removed unnecessary components in the algorithm and designed the system using a field-programmable gate array (FPGA) to implement high-speed processing. The hardware blocks were designed using the Xilinx ZCU104 board, and the pyramid and matching blocks were designed using programmable logic for accelerated operations. To validate the proposed system, we established a verification environment using stage equipment commonly used in industrial settings and reference-software-based validation frameworks. The output results from the FPGA were transmitted to the wafer-alignment controller for system verification. The proposed system reduced the data-processing time by approximately 30% and achieved a level of accuracy in detecting wafer markers that was comparable to that achieved by reference software, with minimal deviation. This system can be used to increase precision and productivity during semiconductor manufacturing processes.

• KIPS Transactions on Software and Data Engineering
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• v.8 no.7
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• pp.265-274
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• 2019

The reliability test performed when developing the weapon system software is classified into static test and dynamic test. In static test, checking the coding rules, vulnerabilities and source code metric are performed without executing the software. In dynamic test, its functions are verified by executing the actual software based on requirements and the code coverage is measured. The purpose of this static/dynamic test is to find out defects that exist in the software. However, there still exist defects that can't be detected only by the current reliability test on the weapon system software. In this paper, whether defects that may occur in the software can be detected by static test and dynamic test of the current reliability test on the weapon system is analyzed through experiments. As a result, we provide guidance on improving the reliability test of weapon system software, especially the dynamic test.

• KIPS Transactions on Software and Data Engineering
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• v.6 no.4
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• pp.167-176
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• 2017

There are increasing policies and safeguards to prevent various human resource losses with the development of automotive industry. Currently ISO26262 $1^{st}$ edition has been released in 2011 to ensure functional safety of electrical and electronic systems and the $2^{nd}$ edition will be released in the second half of 2016 as part of a trend. The E/E (Electrical & Electronics) system requirements verification is required through walk-through, 인스펙션, semi-formal verification and formal verification in ISO 26262. This paper describe the efficiency of model checking for the E/E system requirements verification by applying the product development project of ASIL (Automotive Safety Integrity Level) D for the electrical parking brake system.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.2
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• pp.259-266
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• 2021

USB bus not only works with convenience but also transmits data fast and becomes a standard peripheral interface between FPGA development board and personal computer. In this paper FPGA verification system with slave FIFO interface for Cypress FX3 USB 3 bridge chip was implemented. The designed slave FIFO interface consists of host interface module based on FIFO structure, master bus controller and command decoder and supports streaming communication interface for FX3 bridge chip and memory-mapped input and output interface for user design circuit. The ZestSC3 board with Cypress FX3 USB 3 bridge chip and Xilinx Artix FPGA(XC7A35T-1C5G3241) was used to implement FPGA verification system. It was verified that the FPGA verification system for user design circuit operated correctly under various clock frequencies using GUI software developed by visual C# and C++ DLL. The designed slave FIFO interface for FPGA verification system has modular structure and can be applicable to the different user designs with memory-mapped I/O interface.

• The Journal of the Convergence on Culture Technology
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• v.10 no.5
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• pp.707-713
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• 2024

This paper analyzes the current status of identity verification and authentication procedures when issuing and using alternative means for resident registration numbers and suggests measures to improve the problems. Users unconsciously use identity verification services by responding to identity verification requests from Internet service providers (ISPs). Ultimately, online service users are providing excessive amounts of personal information, and ISPs are charging fees for identity verification services, ultimately increasing online service costs. Therefore, this paper analyzes the current status of identity verification and authentication procedures for users when issuing and using alternative means for resident registration numbers and suggests measures to improve the problems.

• Journal of Advanced Navigation Technology
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• v.28 no.5
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• pp.588-593
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• 2024

Korea augmentation satellite system (KASS), KASS training and test platform (KTTP) was developed for KASS operator and maintainer training and KASS system verification, and it is an independently operated system. KTTP has one each of KASS reference station (KRS), KASS processing station (KPS), KASS uplink station (KUS), network bench, geostationary earth orbit (GEO) simulator and added the one central monitoring & control simulator (CMS) to switch the master operation mode to backup. Hardware and software of KTTP are identical to the KASS system. Therefore, the area where KTTP is installed must be verified through site infrastructure acceptance review (SIAR) in the same way as the KASS system. KTTP Verification is based on the KASS system integration, verification, qualification (IVQ) procedure, and verification was completed with a focus on the functionality rather than performance.

• The Journal of Korean Association of Computer Education
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• v.7 no.6
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• pp.129-139
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• 2004

In developing highly reliable systems such as C4I systems formal methods provide both developers and clients with assurance that they are in the right development processes. This paper investigates into techniques for formal specifications and tests for software components where rigorous verification is required. In particular, the paper suggests decomposition techniques for state-model based specifications using the weakest precondition, and suggests test methods for the specification by generating black box test-cases.

• Aerospace Engineering and Technology
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• v.2 no.2
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• pp.96-104
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• 2003

Geostationary satellite propulsion system provides satellite with the velocity increment for attitude control operations and sationkeeping operations from satellite launch to de-orbit at the end of life. Today, various types of propulsion system and its thrusters are produced by worldwide manufactures. Therefore, geostationary satellite manufacturers give significant modification to the Mission Analysis Software whenever different type of propulsion system type is adopted. Mission Analysis Software is a tool for planning and verification of satellite mission. For the development of the Generalized Mission Analysis Software, many thrusters are carefully investigated and modeled.

• IEMEK Journal of Embedded Systems and Applications
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• v.2 no.4
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• pp.260-273
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• 2007

The wireless sensor network (WSN) nodes are required to operate for several months with the limited system resource such as memory and power. The hardware platform of WSN has 128Kbyte program memory and 8Kbytes data memory. Also, WSN node is required to operate for several months with the two AA size batteries. The MAC, Network protocol, and small application must be operated in this WSN platform. We look around the problem of memory and power for WSN requirements. Then, we propose a new computing model of system software for WSN node. It is the Atomic Object Model (AOM) with Dual Priority Scheduling. For the verification of model, we design and implement IEEE 802.15.4 MAC protocol with the proposed model.