• Journal of the Korean Society for Aeronautical & Space Sciences
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• 제42권3호
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• pp.199-212
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• 2014

This paper describes an autonomous air combat guidance law using a Virtual Pursuit Point (VPP) in one-on-one close engagement for Unmanned Combat Aerial Vehicle (UCAV). The VPPs that consist of virtual lag and lead points are introduced to carry out tactical combat maneuvers. The VPPs are generated based on fighter's aerodynamic performance and Basic Fighter Maneuver (BFM)'s turn circle, total energy and weapon characteristics. The UCAV determines a single VPP and executes pursuit maneuvers based on a smoothing function which evaluates probabilities of the pursuit types for switching maneuvers with given combat states. The proposed law is demonstrated by high-fidelity real-time combat simulation using commercial fighter model and X-Plane simulator.

• Journal of the Institute of Electronics Engineers of Korea SD
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• 제44권1호
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• pp.59-67
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• 2007

This paper presents a low power dual-level low voltage differential signaling (DLVDS) technique using current source switching for LCD driver ICs in portable products. The transmitter makes dual level signal that has two different level signal 400mVpp and 250mVpp while keeping the advantages of LVDS. The decoding circuit recovers the primary signal from DLVDS. The low power DLVDS is implemented using a $0.25{\mu}m$ CMOS process under 2.5V supply. The proposed circuit shows 800Mbps/2-line data rate and 9mW, 11.5mW power consumptions in transmitter and receiver, respectively. The proposed DLVDS scheme reduce power consumption dramatically compare with conventional one.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 한국해양정보통신학회 2011년도 춘계학술대회
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• pp.143-146
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• 2011

A 50-MS/s 10-bit pipelined ADC with 1.2Vpp differential input range is proposed in this paper. The designed pipelined ADC consists of eight stage of 1.5bit/stage, one stage of 2bit/stage, digital error correction block, bias & reference driver, and clock generator. 1.5bit/stage is consists of sub-ADC, DAC and gain stage, Specially, a sample-and hold amplifier (SHA) is removed in the designed pipelined ADC to reduce the hardware and power consumption. Also, the proposed bootstrapped switch improves the Linearity of the input analog switch and the dynamic performance of the total ADC. The reference voltage was driven by using the on-chip reference driver without external reference. The proposed pipelined ADC was designed by using a 0.18um 1-poly 5-metal CMOS process with 1.8V supply. The total area including the power decoupling capacitor and power consumption are $0.95mm^2$ and 60mW, respectively. Also, the simulation result shows the ENOB of 9.3-bit at the Nyquist sampling rate.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 한국해양정보통신학회 2010년도 추계학술대회
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• pp.84-87
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• 2010

We manufacture an antifuse OTP (One-time programmable) cell for analog trimming which will be used in power management ICs. For the antifuse cell using dual program voltage of VPP (=7V) and VNN (=-5V), the thin gate oxide is broken down by applying a voltage higher than the hard break-down voltage to the terminals of the antifuse. The area of the manufactured antifuse OTP cell using $0.18{\mu}m$ BCD process is $48.01{\mu}m^2$ and is about 44.6 percent of that of an eFuse cell. The post-program resistances of the antifuse are good with the values under several kilo ohms when we measure twenty test patterns.

• The Transactions of the Korean Institute of Electrical Engineers P
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• 제63권1호
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• pp.40-45
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• 2014

This study examines the system and process of battery stored energy in vehicles and suggest the effective area for the use of V2G(vehicle-to-grid) from Jeju Smart Grid Demonstration Project. V2G means technology of electric power transmission from the battery of electric-drive vehicles to state grid. As for the increasing of effectiveness for demand-side control, V2G is a very good alternative. In the U.S., the utilization of electric vehicles is under 40% on average. In this case, we can use he battery of electric vehicle as role of frequency regulation or generator of demand-side resource. V2G, which is the element of Smart Transportation, consists of electric vehicle battery, BMS(battery management system), OBC(on-board charger), charging infrastructure, NOC(network operating center) and TOC(total operation center). V2G application has been tested for frequency regulation to secure the economical efficiency in the United States. In this case, the battery cycle life is not verified its disadvantage. On the other hand, Demand Response is required by low c-rate of battery in electric vehicle and It can be small impact on the battery cycle life. This paper concludes business area of demand response is more useful than frequency regulation in V2G application of electric vehicles in Korea. This provides the opportunity to create a new business for power grid administrator with VPP(virtual power plant).

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 한국정보통신학회 2012년도 추계학술대회
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• pp.852-855
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• 2012

A DC-DC converter for EEPROM IPs which perfom erasing by the FN (Fowler-Nordheim) tunneling and programming by the band-to-band tunneling is designed in this paper. For the DC-DC converter for EEPROM IPs using a low voltage of $1.5V{\pm}10%$ as the logic voltage, a scheme of using VRD (Read Voltage) instead of VDD is proposed to reduce the pumping stages and pumping capacitances of its charge pump circuit. VRD ($=3.1V{\pm}0.1V$) is a regulated voltage by a voltage regulator using an external voltage of 5V. The designed DC-DC converter outputs VPP (=8V) and VNN (=-8V) in the write mode.

• The Journal of Korean Institute of Communications and Information Sciences
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• 제35권5A호
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• pp.504-512
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• 2010

The paper proposes the 6bit 800MS/s flash A/D converter that can be applied to wireless USB chip-set. The paper simplified the error correction circuit and synchronization block as one circuit which are used respectively, and furthermore reduced the burden on the hardware. Comparing to the conventional error correction circuit, the proposed error correction circuit in this paper reduced 5 MOS transistors, the area of each error correction circuit is reduced by 9%. The A/D converter is fabricated with 0.18um CMOS 1-poly 6-metal process, and power dissipation is 182mW at 0.8Vpp input range and 1.8V supply voltage. The measured result shows 4.0bit of ENOB at 800MS/s conversion rate and 128.1MHz input frequency.

• Polymer(Korea)
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• 제36권5호
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• pp.599-605
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• 2012

The physicochemical properties such as surface hardness, solvent mechanical wear resistance, and resistance to scratch properties of poly(3,4-ethylenedioxythiophene) (PEDOT) thin film prepared by vapor phase polymerization (VPP) was effectively improved by post-treatment of various metal alkoxide sol solutions. Metal oxide layer derived from sol-gel process of metal alkoxide was generated on the PEDOT thin film layer by VPP, resulting in improving mechanical properties of the conductive thin films without any deterioration of their original surface resistance. Several kinds of silicone and titanium alkoxide derivatives with various functional groups were used as metal alkoxide sol sources. Among them, PEDOT-metal oxide composite thin film derived tetraethyl orthosilicate showed the best performance in the terms of surface resistance, transmittance, and various physicochemical properties. The effect of metal alkoxide content in washing solution, oxidant content and drying temperature have been investigated in order to optimize the various properties of PEDOT-metal oxide composite thin film.

• Journal of the Institute of Electronics Engineers of Korea SC
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• 제49권1호
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• pp.80-87
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• 2012

We have developed the ATE(Automatic Test Equipment) system for the performance test of pre-amplifier of thermal imaging devices. The device regenerates the electronic signals of photon detection module which is normally in weak energy, for the image signals processing. Previous ATE system was primarily and actively developed in the field of semiconductor devices quality parts inspection. Recently, it has been studied in the field of performance testing of equipment. In the field of thermal performance test equipment, however, it lacks the study of ATE compared to other areas, which causes the maintenance related to the core of military thermal imaging system maintenance to be limited. In this paper, a new study of ATE in the field of thermal imaging system is done. It is designed to be used universally for the ATE system with different types of circuit card of thermal imaging system by adopting matrix relays. Using the developed ATE measuring the pre-amplifier amplitude, an average amplified amplitude of 2.71Vpp was measured which confirms that it is within the range of theoretical analysis and also verifies the good performance of the developed ATE.

• The Journal of Korean Institute of Communications and Information Sciences
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• 제30권1A호
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• pp.104-112
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• 2005

Some design techniques for high speed and low power pipelined 8-bit ADC are described. To perform high-speed operation with relatively low power consumption, open loop architecture is adopted, while closed loop architecture (with MDAC) is used in conventional pipeline ADC. A distributed track and hold amplifier and a cascading structure are also adopted to increase the sampling rate. To reduce the power consumption and the die area, the number of amplifiers in each stage are optimized and reduced with proposed zero-crossing point generation method. At 500-MHz sampling rate, simulation results show that the power consumption is 210mW including digital logic with 1.8V power supply. And the targeted ADC achieves ENOB of about 8-bit with input frequency up to 200-MHz and input range of 1.2Vpp (Differential). The ADC is designed using a $0.18{\mu}m$ 6-Metal 1-Poly CMOS process and occupies an area of $900{\mu}m{\times}500{\mu}m$