• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.15 no.1
• /
• pp.71-79
• /
• 1990

An analog phase shifter is designed at the operating frequency 10GHz that is coupled with a hybrid ring and the network connecting an inductor series with a varactor to extend a continuous chage in the phase of the reflected output wave to be produced from a variation in the terminated varactor reactance as a variation in the reverse bias voltage. It is manufactured in a microstripline in consideration of an effect of the dispersion characteristics and discontinuities. As a resuls of an experiment, a change in the phase is achieved over 180 degree from $52.34^{\circ}$ degrees to $235.01^{\circ}$degrees, the transmission loss is -3.6~-14.3dB, and the return loss is -16~-8dB(1.37

• Journal of Communications and Networks
• /
• v.13 no.5
• /
• pp.536-543
• /
• 2011

The heterogeneous postal delivery model assumes that each intermediate node in the multicasting tree incurs a constant switching time for each message that is sent. We have proposed a new model where we assume a more generalized switching time at intermediate nodes. In our model, a child node v of a parent u has a switching delay vector, where the ith element of the vector indicates the switching delay incurred by u for sending the message to v after sending the message to i-1 other children of u. Given a multicast tree and switching delay vectors at each non-root node 5 in the tree, we provide an O(n$^{\frac{5}{2}}$) optimal algorithm that will decide the order in which the internal (non-leaf) nodes have to send the multicast message to its children in order to minimize the maximum end-to-end delay due to multicasting. We also show an important lower bound result that optimal multicast switching delay problem is as hard as min-max matching problem on weighted bipartite graphs and hence O(n$^{\frac{5}{2}}$) running time is tight.

• Proceedings of the Korea Information Processing Society Conference
• /
• 2024.05a
• /
• pp.891-894
• /
• 2024

The quest for reliability in Artificial Intelligence (AI) is progressively urgent, especially in the field of next generation wireless networks. Future Beyond 5G (B5G)/6G networks will connect a huge number of devices and will offer innovative services invested with AI and Machine Learning tools. Wireless communications, in general, and medium access control (MAC) techniques were among the fields that were heavily affected by this improvement. This study presents the applications and services of future communication networks. This study details the Medium Access Control (MAC) scheduler of Beyond-5G/6G from 3^rd Generation Partnership (3GPP) and highlights the current open research issues which are yet to be optimized. This study provides an overview of how AI plays an important role in improving next generation communication by solving MAC-layer issues such as resource scheduling and queueing. We will select C-V2X as our use case to implement our proposed MAC scheduling model.

• Journal of electromagnetic engineering and science
• /
• v.14 no.2
• /
• pp.47-53
• /
• 2014

This paper presents a high gain and high harmonic rejection low-noise amplifier (LNA) for software-defined radio receiver. This LNA exploits the high quality factor (Q) series resonance technique. High Q series resonance can amplify the in-band signal voltage and attenuate the out-band signals. This is achieved by a source impedance transformation. This technique does not consume power and can easily support multiband operation. The chip is fabricated in a $0.13-{\mu}m$ CMOS. It supports four bands (640, 710, 830, and 1,070MHz). The measured forward gain ($S_{21}$) is between 12.1 and 17.4 dB and the noise figure is between 2.7 and 3.3 dB. The IIP3 measures between -5.7 and -10.8 dBm, and the third harmonic rejection ratios are more than 30 dB. The LNA consumes 9.6 mW from a 1.2-V supply.

• The Journal of The Korea Institute of Intelligent Transport Systems
• /
• v.12 no.5
• /
• pp.52-60
• /
• 2013

ITS technologies are in the research and development around the world as a solution for maximizing the efficiency of the existing road infrastructure, solving the complex traffic problems and providing the convenient driving services. The core of these ITS technologies is to provide the information for the requesting users in fast and accurate way from the server. In real driving conditions, there are many communication barriers around the vehicles and the base stations so that an accurate and robust handover technology is needed in order to ensure seamless ITS services. This paper introduced an WAVE handover algorithm implemented in a real communication device and five parameters mainly affecting the handover performance are evaluated. The handover performance is measured by changing the parameter values at a highway testbed. The test results show that the handover algorithm parameter values should be configured carefully to remove the handover ping-pong problems.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.37A no.9
• /
• pp.799-808
• /
• 2012

Bit operation of scrambler in the WAVE System become less efficient because parallel processing is impossible in terms of hardware and software. In this paper, we propose algorism to find the starting position of the matrix table. Also, when bit operation algorithm of scrambler and algorithms for matrix table, algorithm used to find starting position of the matrix table were compared with the performance as 8 bit, 16bit, 32 bit processing units. As a result, the number of processing times per second could be done 2917.8 times more in an 8-bit, 5432.1 times in a 16-bit, 10277.8 times in a 32 bit. Therefore, algorithm to find the starting position of the matrix table improves the speed of the scrambler in the WAVE and the receiving speed of a variety of information gathering and precision over the Vehicle to Infra or Vehicle to Vehicle in the Intelligent Transport Systems.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.11
• /
• pp.48-55
• /
• 2009

This paper presents a high-speed Forward Error Correction (FEC) architecture based on three-parallel Reed-Solomon (RS) decoder for next-generation 100-Gb/s optical communication systems. A high-speed three-parallel RS(255,239) decoder has been designed and the derived structure can also be applied to implement the 100-Gb/s RS-FEC architecture. The proposed 100-Gb/s RS-FEC has been implemented with 0.13-${\mu}m$ CMOS standard cell technology in a supply voltage of 1.2V. The implementation results show that 16-Ch. RS-FEC architecture can operate at a clock frequency of 300MHz and has a throughput of 115-Gb/s for 0.13-${\mu}m$ CMOS technology. As a result, the proposed three-parallel RS-FEC architecture has a much higher data processing rate and low hardware complexity compared with the conventional two-parallel, three-parallel and serial RS-FEC architectures.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.42 no.3
• /
• pp.585-594
• /
• 2017

Wireless Docking system can provide enhanced convenience to user experience of handheld device such as smart phone by using previously deployed peripheral devises such as monitor and keyboard. In this environment, user can easily use the handheld device with variable peripheral devices at any docking system place. This system would be composed of peripherals except host computing device contrarily to previous desktop and laptop environment. For this system, Wi-Fi Alliance has been developing standard technology based on Wi-Fi Direct(Wi-Fi Peer-to-Peer Technical Specifications v1.2, 2010) technology. However, this system can make a problem which may lead to complex connectivity on handheld device due to non-compatible communication interface. To address given problem, we designed a new method of Bluetooth tunneling technology via previous Wi-Fi Direct communication, and evaluated it with experiment results.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.29 no.11A
• /
• pp.1263-1270
• /
• 2004

A low-power 64-point FFT/IFFT processor core is designed, which is an essential block in OFDM-based wireless LAM modems. The radix-2/418 DIF (Decimation-ln-Frequency) FFT algorithm is implemented using R2SDF (Radix-2 Single-path Delay Feedback) structure. Some design techniques for low-power implementation are considered from algorithm level to circuit level. Based on the analysis on infernal data flow, some unnecessary switching activities have been eliminated to minimize power dissipation. In circuit level, constant multipliers and complex-number multiplier in data-path are designed using truncation structure to reduce gate counts and power dissipation. The 64-point FFT/IFFT core designed in Verilog-HDL has about 28,100 gates, and timing simulation results using gate-level netlist with extracted SDF data show that it can safely operate up to 50-MHz＠2.5-V, resulting that a 64-point FFT/IFFT can be computed every 1.3-${\mu}\textrm{s}$. The functionality of the core was fully verified by FPGA implementation using various test vectors. The average SQNR of over 50-dB is achieved, and the average power consumption is about 69.3-mW with 50-MHz＠2.5-V.

• Journal of Communications and Networks
• /
• v.16 no.2
• /
• pp.183-192
• /
• 2014

This paper proposes a payment-based power control scheme using non-cooperative game with a novel pricing function in cognitive radio networks (CRNs). The proposed algorithm considers the fairness of power control among second users (SUs) where the value of per SU' signal to noise ratio (SINR) or distance between SU and SU station is used as reference for punishment price setting. Due to the effect of uncertainty fading environment, the system is unable to get the link gain coefficient to control SUs' transmission power accurately, so the quality of service (QoS) requirements of SUs may not be guaranteed, and the existence of Nash equilibrium (NE) is not ensured. Therefore, an alternative iterative scheme with sliding model is presented for the non-cooperative power control game algorithm. Simulation results show that the pricing policy using SUs' SINR as price punishment reference can improve total throughput, ensure fairness and reduce total transmission power in CRNs.