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Electronic Control of Braking Force Distribution for Vehicles Using a Direct Adaptive Fuzzy Controller

  • Kim, Hunmo;Kim, Seungdae;Sung, Yoon-Gyeoung
    • Journal of Mechanical Science and Technology
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    • v.15 no.1
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    • pp.66-80
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    • 2001
  • In brake systems, a proportioning valve(P. V), which reduces the brake line pressure on each wheel cylinder for the anti-locking of rear wheels, is closely related to the safety of vehicles. However, it is impossible for current P. V. s to completely control brake line pressure because, mechanically, it is an open loop control system. In this paper we describe an electronic brake force distribution system using a direct adaptive fuzzy controller in order to completely control brake line pressure using a closed loop control system. The objective of the electronic brake force distribution system is to change the cut-in-pressure and the valve slop of the P. V in order to obtain better performance of the brake system than with mechanical systems.

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A 1V 10b 30MS/s CMOS ADC Using a Switched-RC Technique (스위치-RC 기법을 이용한 1V 10비트 30MS/s CMOS ADC)

  • Ahn, Gil-Cho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.8
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    • pp.61-70
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    • 2009
  • A 10b 30MS/s pipelined ADC operating under 1V power supply is presented. It utilizes a switched-RC based input sampling circuit and a resistive loop to reset the feedback capacitor in the multiplying digital-to-analog converter (MDAC) for the low-voltage operation. Cascaded switched-RC branches are used to achieve accurate grain of the MDAC for the first stage and separate switched-RC circuits are used in the sub-ADC to suppress the switching noise coupling to the MDAC input The measured differential and integral non-linearities of the prototype ADC fabricated in a 0.13${\mu}m$, CMOS process are less than 0.54LSB and 1.75LSB, respectively. The prototype ADC achieves 54.1dB SNDR and 70.4dB SFDR with 1V supply and 30MHz sampling frequency while consuming 17mW power.

Solution processed inverted organic solar cells with hybrid inorganic/organic cathode interlayers

  • Lee, Jung Suk;Cha, Myoung Joo;Park, Yu Jung;Kim, Jin Young;Seo, Jung Hwa;Walker, Bright
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.154.2-154.2
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    • 2016
  • In this work, we introduce a solution-processed CdS interlayer for use in inverted bulk heterojunction (BHJ) solar cells, and compare this material to a series of standard organic and inorganic cathode interlayers. Different combinations of solution-processed CdS, ZnO and conjugated polyelectrolyte (CPE) layers were compared as cathode interlayers on ITO substrates to construct inverted solar cells based on $PTB7:PC_{71}BM$ and a $P3HT:PC_{61}BM$ as photoactive layers. Introduction of a CdS interlayer significantly improved the power conversion efficiency (PCE) of inverted $PTB7:PC_{71}BM$ devices from 2.0% to 4.9%, however, this efficiency was still fairly low compared to benchmark ZnO or CPE interlayers due to a low open circuit voltage ($V_{OC}$), stemming from the deep conduction band energy of CdS. The $V_{OC}$ was greatly improved by introducing an interfacial dipole (CPE) layer on top of the CdS layer, yielding outstanding diode characteristics and a PCE of 6.8%. The best performing interlayer, however, was a single CPE layer alone, which yielded a $V_{OC}$ of 0.727 V, a FF of 63.2%, and a PCE of 7.89%. Using $P3HT:PC_{61}BM$ as an active layer, similar trends were observed. Solar cells without the cathode interlayer yielded a PCE of 0.46% with a poor $V_{OC}$ of 0.197 V and FF of 34.3%. In contrast, the use of hybrid ZnO/CPE layer as the cathode interlayer considerably improved the $V_{OC}$ of 0.599 V and FF of 53.3%, resulting the PCE of 2.99%. Our results indicate that the CdS layer yields excellent diode characteristics, however, performs slightly worse than benchmark ZnO and CPE layers in solar cell devices due to parasitic absorption below 550 nm. These results suggest that the hybrid inorganic/organic interlayer materials are promising candidates as cathode interlayers for high efficiency inverted solar cells through the modification of interface contacts.

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A nuclear battery based on silicon p-i-n structures with electroplating 63Ni layer

  • Krasnov, Andrey;Legotin, Sergey;Kuzmina, Ksenia;Ershova, Nadezhda;Rogozev, Boris
    • Nuclear Engineering and Technology
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    • v.51 no.8
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    • pp.1978-1982
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    • 2019
  • The paper presents the electrical performance measurements of a prototype nuclear battery and two types of betavoltaic cells. The electrical performance was assessed by measuring current-voltage properties (I-V) and determining the short-circuit current and the open-circuit voltage. With 63Ni as an irradiation source, the open-circuit voltage and the short-circuit current were determined as 1 V and 64 nA, respectively. The prototype consisted of 10 betavoltaic cells that were prepared using radioactive 63Ni. Electroplating of the radioactive 63Ni on an ohmic contact (Ti-Ni) was carried out at a current density of 20 mA/㎠. Two types of betavoltaic cells were studied: with an external 63Ni source and a 63Ni-covered source. Under irradiation of the 63Ni source with an activity of 10 mCi, the open-circuit voltage Voc of the fabricated cells reached 151 mV and 109 mV; the short-circuit current density Jsc was measured to be 72.9 nA/cm2 and 64.6 nA/㎠, respectively. The betavoltaic cells had the fill factor of 55% and 50%, respectively.

Analysis of Simulation Results for Secondary Arc in 765kV single transmission line (765kV 1회선 선로의 2차아크 모의결과 분석)

  • Ahn, S.P.;Kim, C.H.;Park, N.O.;Ju, H.J.;Shim, E.B.
    • Proceedings of the KIEE Conference
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    • 2004.11b
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    • pp.36-38
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    • 2004
  • In many countries, including Korea, in order to transmit the more electric power, the higher transmission line voltage is inevitable. So, a rapid reclosing scheme is important for UHV transmission lines to ensure requirements for high reliability of main lines. But, because of the high voltage and long span of UHV lines, the secondary arc current flows across the fault point even after the interruption of the fault current. i.e. A critical aspect of reclosing operation is the extinction of the secondary arc since it must extinguish before successful reclosure can occur. In Korea transmission lines, it is scheduled to energize 765kV single transmission line(79km) between Sin-Ansung S/S and Sin-Gapyeong S/S at June 2006. Therefore this paper analyzes characteristics of the secondary arc extinction on 765kV single transmission line using EMTP. Simulation results shows that the average value of the secondary arc is $30A_{rms}$ and the auto-extinction time of it is longer at closer point to Sin-Gapyeong S/S.

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Defect studies of annealed AgInS$_2$ epilayer (열처리된 AgInS$_2$ 박막의 defect 연구)

  • 백승남;홍광준
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.257-265
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    • 2002
  • A stoichiometric mixture of evaporating materials for AgInS$_2$ single crystal thin films was prepared from horizontal furnace. To obtain the single crystal thin films, AgInS$_2$ mixed crystal was deposited on thoroughly etched semi-insulating GaAs(100) substrate by the Hot Wall Epitaxy(HWE) system. The source and substrate temperatures were 680 $^{\circ}C$ and 410 $^{\circ}C$, respectively. The crystalline structure of the single crystal thin films was investigated by the photoluminescence and double crystal X-ray diffraction(DCXD). The carrier density and mobility of AgInS$_2$ single crystal thin films measured from Hall effect by van der Pauw method are 9.35${\times}$10$\^$16/ cm$\^$-3/ and 294 $\textrm{cm}^2$/V$.$s at 293 K, respectively. From the optical absorption measurement, the temperature dependence of the energy band gap on AgInS$_2$ single crystal thin films was found to be E$\_$g/(T) : 2.1365 eV - (9.89 ${\times}$ 10$\^$-3/ eV) T$^2$/(2930 + T). After the as-grown AgInS$_2$ single crystal thin films was annealed in Ag-, S-, and In-atmospheres, the origin of point defects of AgInS$_2$ single crystal thin films has been investigated by using the photoluminescence(PL) at 10 K. The native defects of V$\_$AG/, V$\_$S/, Ag$\_$int/, and S$\_$int/ obtained from PL measurements were classified as a donors or acceptors type. And we concluded that the heat-treatment in the S-atmosphere converted AgInS$_2$ single crystal thin films to an optical p-type. Also, we confirmed that In in AgInS$_2$/GaAs did not form the native defects because In in AgInS$_2$ single crystal thin films did exist in the form of stable bonds.

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The effect of thermal annealing and growth of $AgInS_2$/GaAs single crystal thin film by hot wal epitaxy (Hot wall Epitaxy(HWE)법에 의한 $AgInS_2$단결정 박막 성장과 열처리 효과)

  • Hong, Kwang-Joon
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.11 no.6
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    • pp.274-284
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    • 2001
  • A stoichimetric mixture of evaporating materials for $AgInS_2$ single crystal thin films was prepared from horizontal furnace. To obtain the single crystal thin films. $AgInS_2$mixed crystal was deposited on thorughly etched semi-insulating GaAs(100) substrate by the Hot wall Epitaxy (HWE) system. The source and substrate temperatures were $680^{\circ}C$ and $410^{\circ}C$, respectively. The crystalline structure of the single thin films was investigated by the photoluminescence and double crystal X-ray diffraction(DCXD). The carrier density and mobility of $AgInS_2$ single crystal the films measured from Hall effect by van der Pauw method are $9.35\times 10^{16}/\terxtm{cm}^3$ and $294\terxtm{cm}^2$/V.s at 293 K, respectively. From the optical absorption measurement the temperature dependence of the energy band gap on AgInS$_2$ single crystal thin film was found to be $E_g$(T)= 2.1365eV-($9.89\times 10^{-3}eV/T^2$/(2930+T). After the as-grown $AgInS_2$ single crystal thin films was annealed in $Ag^-S^-$ and In-atmospheres, the origin of point defects of AgInS$_2$ single crystal the films has been investigated by using the photoluminescence(PL) at 10K. The native defects of $V_{Ag},V_s, Ag_{int}$ and $S_{int}$ int/ obtained from PL measurements were classified as a donors or acceptors type. And we concluded that the heat-treatment in the S-atmosphere converted $AgInS_2$ single crystal thin films to an optical p-type. Also, we confirmed that In in $AgInS_2$ /GaAs did not form the native defects because In is $AgInS_2$ single crystal thin films did exist in the form of stable bonds.

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Studies on the High-gain Low Noise Amplifier for 60 GHz Wireless Local Area Network (60 GHz 무선 LAN의 응용을 위한 고이득 저잡음 증폭기에 관한 연구)

  • 조창식;안단;이성대;백태종;진진만;최석규;김삼동;이진구
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.11
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    • pp.21-27
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    • 2004
  • In this paper, millimeter-wave monolithic integrated circuit(MIMIC) low noise amplifier(LNA) for V-band, which is applicable to 60 GHz wireless local area network(WLAN), was fabricated using the high performance 0.1 ${\mu}{\textrm}{m}$ $\Gamma$-gate pseudomorphic high electron mobility transistor(PHEMT). The DC characteristics of PHEMT are drain saturation current density(Idss) of 450 mA/mm and maximum transconductance(gm, max) of 363.6 mS/mm. The RF characteristics were obtained the current gain cut-off frequency(fT) of 113 GHz and the maximum oscillation frequency(fmax) of 180 GHz. V-band MIMIC LNA was designed using active and passive device library, which is composed of 0.1 ${\mu}{\textrm}{m}$ $\Gamma$-gate PHEMT and coplanar waveguide(CPW) technology. The designed V-band MIMIC LNA was fabricated using integrated unit processes of active and passive device. The measured results of V-band MIMIC LNA are shown S21 gain of 21.3 dB, S11 of -10.6 dB at 60 GHz and S22 of -29.7 dB at 62.5 GHz. The measured result of V-band MIMIC LNA was shown noise figure (NF) of 4.23 dB at 60 GHz.

Analysis of SMPS Characteristics applying Ground Plane Layer (Ground Plane레이어를 적용한 SMPS 특성분석)

  • Park, Jin-Hong
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.1
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    • pp.436-440
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    • 2014
  • To verity the effect of PCB plane layer to the output characteristics of the Switched Mode Power Supply (SMPS), this paper compared with a generic one-layer PCB and a double-side PCB. This paper specially focused on the voltage, the current and the high frequency noise of the output characteristic of the SMPS, using a double-side PCB which has same layout and was installed a ground plane on the opposite side. This double-side PCB was assembled by all same components which used on the SMPS using the single-side PCB. The experiment results show the SMPS using the ground plan PCB can efficiently reduce the high frequency noise to 50mV at 100MHz from 150mV in the single-side PCB. And the results also show the high harmonics frequency was reduced as well.