• Transactions on Electrical and Electronic Materials
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• v.6 no.1
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• pp.1-5
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• 2005

Continued scaling of MOS devices requires the formation of the ultra shallow and very heavily doped junction. The simulation and experiment results show that the degradation of pMOS performance in logic and SRAM pMOS devices due to the excessive diffusion of the tail and a large amount of dose loss in the extension region. This problem comes from the high-temperature long-time deposition process for forming the spacer and the presence of fluorine which diffuses quickly to the $Si/SiO_{2}$ interface with boron pairing. We have studied the method to improve the pMOS performance that includes the low-energy boron implantation, spike annealing and device structure design using TCAD simulation.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1032-1035
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• 2009

Several different production technologies for Low-Temperature Poly-Silicon (LTPS) have been proposed over the last years. However, finally the progress in Excimer-laser-based crystallization has lead to the best cost-to-performance ratio of LTPS manufacturing for use in active-matrix-based displays. In this paper, we report on recent and significant technical advances in light sources, optical beam deliveries and beam irradiation systems targeted at enabling ultra-uniform mura-free LTPS active-matrix backplanes while simultaneously lowering production costs and increasing throughput.

• Korean Journal of Materials Research
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• v.25 no.10
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• pp.537-542
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• 2015

One-dimensional (1D) silver nanostructures, which possess the highest conductivity among all room-temperature materials, moderate flexibility and high transmittance, are one of the most promising candidate materials to replace conventional indium tin oxide transparent electrodes. However, the short length and large diameter of 1D silver nanostructures cause a substantial decrease in the optical transparency or an increase in the sheet resistance. In this work, ultra-long silver nanofiber networks were synthesized with a low-cost and scalable electrospinning process, and the diameter of the nanofibers were finetuned to achieve a higher aspect ratio. The decrease in the diameter of the nanofibers resulted in a higher optical transparency at a lower sheet resistance: 87 % at $300{\Omega}/sq$, respectively. It is expected that an electrospun silver nanofiber based transparent electrode can be used as a key component in various optoelectronic applications.

• Journal of the Korean Ceramic Society
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• v.35 no.10
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• pp.1049-1054
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• 1998

In order to fabricate ideal powders new processing is necessary in which the solute atoms in solution ra-pidly move to mix each other to the degree of molecular level the viscosity of solution should be low not to effect the moving of solute atoms and the powders could be directly obtained as crystalline. Supercritical fluid is defined as condensed gas sated up to its critical pressure and temperature. In this paper su-percritical fluid methods were studied as a new ceramic processing of powder preparation. The crystalline powders of TiO2 which are useful for electronic ceramic materials were fabricated by hydrolysis of titanium (IV) ethoxide using ethanol as a supercritical fluid at the condition of 270$\pm$3$^{\circ}C$, 7.3 MPa for 2hr. The cry stalline anatase powders could be directly obtained and its primary particle size was 20 min.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.4
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• pp.261-266
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• 1998

In developing the high density memory device, the etching of fine pattern is becoming increasingly important. Therefore, definition of ultra fine line and space pattern and minimization of damage and contamination are essential process. Also, the high density plasma in low operating pressure is necessary. The candidates of high density plasma sources are electron cyclotron resonance plasma, helicon wave plasma, helical resonator, and inductively coupled plasma. In this study, planar type magnetized inductively coupled plasma etcher has been built. The density and temperature of Ar plasma are measured as a function of rf power, flow rate, external magnetic field, and pressure. The oxide etch rate and selectivity to polysilicon are measured as the above mentioned conditions and self-bias voltage.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.341-342
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• 2017

본 논문에서는 초저온 냉동고용 단상유도전동기의 기동전류저감을 위한 알고리즘을 제안한다. 단상유도전동기의 경우, 스스로 기동이 불가능하므로 다양한 기동방식을 채택하고 있다. 본 논문에서는 커패시터 기동-운전 방식을 사용하고 있으며, 이 경우 기동 시 정격전류의 수배에 해당되는 돌입전류가 발생한다. 이로 인해 커패시터 및 기동 보조장치의 운전성능 및 수명 감소에 직접적인 영향을 미친다. 따라서 본문에서는 기존 운전방식의 변경 없이 단상 인버터를 적용하여 기동전류를 저감하고 운전모드를 전환하는 알고리즘을 제안하고자 한다. 제안한 알고리즘의 효용성은 다양한 실험을 통해서 검증한다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.445-446
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• 2005

This letter reports the fabrication of polycrystalline silicon thin-film transistors (poly-Si TFT) on flexible plastic substrates using amorphous silicon (a-Si) precursor films by sputter deposition. The a-Si films were deposited with mixture gas of argon and helium to minimize the argon incorporation into the film. The precursor films were then laser crystallized using XeCl excimer laser irradiation and a four-mask-processed poly-Si TFTs were fabricated with fully self-aligned top gate structure.

• Journal of Magnetics
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• v.18 no.3
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• pp.339-341
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• 2013

The magnetic field standards, facilities and capabilities available at NPL for the calibration of magnetometers and gradiometers and the measurement of the magnetic properties of materials will be introduced. The details of the low magnetic field facility will be explained and the capabilities this facility enables for the characterisation and calibration of ultra-sensitive room temperature magnetic sensors will be presented. Building on core material capabilities that are compliant with the IEC 60404 series of written standards, the example of a standard permeameter that has been modified for the measurement of strips for real world conditions is discussed. This was incorporated into a stress machine to measure the DC properties of the soft magnetic materials used by the partners of a collaborative industry led R&D project at stress levels of up to 700 MPa. The results for three materials are presented and the changes in the properties with applied stress compared to establish which material exhibits favourable properties.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.149-149
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• 2016

Ceramic is widely known material due to its outstanding mechanical property. Besides, Zirconia(ZrO2) has a low thermal conductivity so it is advantage in a heat insulation. Because of these superior properties, ZrO2 is attracted to many fields using ultra high temperature for example vehicle engines, aerospace industry, turbine, nuclear system and so on. However brittle fracture is a disadvantage of the ZrO2. In order to overcome this problem, we can make the ceramic materials to the forms of ceramic nanoparticles, ceramic nanowhiskers and these forms can be used to an agent of composite materials. In this work, we selected Au catalyzed Vapor-Liquid-Solid mechanism to synthesize ZrO2 nanowhiskers. The ZrO2 whiskers are grown through Hot-wall Chemical Vapor Deposition(Hot wall CVD) using ZrCl4 as a powder source and Au film as a catalyst. This Hot wall CVD method is known to comparatively cost effective. The synthesis condition is a temperature of $1100^{\circ}C$, a pressure of 760torr(1atm) and carrier gas(Ar) flow of 500sccm. To observe the morphology of ZrO2 scanning electron microscopy is used and to identify the crystal structure x-ray diffraction is used.

• Journal of IKEEE
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• v.20 no.2
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• pp.163-166
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• 2016

It is important to operate the driving circuit under the optimal condition through precisely sensing the power consumption causing the temperature made mainly by the MOSFET (metal-oxide semiconductor field-effect transistor) when a BLDC (Brushless Direct Current) motor operates. In this letter, a Super-junction (SJ) power TMOSFET (trench metal-oxide semiconductor field-effect transistor) with an ultra-low specific on-resistance of $0.96m{\Omega}{\cdot}cm^2$ under the same break down voltage of 100 V is designed by using of the SILVACO TCAD 2D device simulator, Atlas, while the specific on-resistance of the traditional power MOSFET has tens of $m{\Omega}{\cdot}cm^2$, which makes the higher power consumption. The SPICE simulation for measuring the power distribution of 25 cells for a chip is carried out, in which a unit cell is a SJ Power TMOSFET with resistor arrays. In addition, the power consumption for each unit cell of SJ Power TMOSFET, considering the number, pattern and position of bonding, is computed and the power distribution for an ANSYS model is obtained, and the SJ Power TMOSFET is designed to make the power of the chip distributed uniformly to guarantee it's reliability.